PIC16C76-10/SP Microchip Technology, PIC16C76-10/SP Datasheet - Page 50
![IC MCU OTP 8KX14 A/D PWM 28DIP](/photos/6/59/65908/150-28-dip_sml.jpg)
PIC16C76-10/SP
Manufacturer Part Number
PIC16C76-10/SP
Description
IC MCU OTP 8KX14 A/D PWM 28DIP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F818-ISO.pdf
(6 pages)
3.PIC16C72-04SO.pdf
(289 pages)
4.PIC16C76-04SP.pdf
(8 pages)
Specifications of PIC16C76-10/SP
Core Size
8-Bit
Program Memory Size
14KB (8K x 14)
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Core Processor
PIC
Speed
10MHz
Connectivity
I²C, SPI, UART/USART
Number Of I /o
22
Program Memory Type
OTP
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Data Converters
A/D 5x8b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
28-DIP (0.300", 7.62mm)
Controller Family/series
PIC16C
No. Of I/o's
22
Ram Memory Size
368Byte
Cpu Speed
10MHz
No. Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC16F818-ISO PDF datasheet #2
- PIC16C72-04SO PDF datasheet #3
- PIC16C76-04SP PDF datasheet #4
- Current page: 50 of 289
- Download datasheet (3Mb)
PIC16C7X
5.4
PORTD is an 8-bit port with Schmitt Trigger input buff-
ers. Each pin is individually configurable as an input or
output.
PORTD can be configured as an 8-bit wide micropro-
cessor port (parallel slave port) by setting control bit
PSPMODE (TRISE<4>). In this mode, the input buffers
are TTL.
TABLE 5-7:
TABLE 5-8:
DS30390E-page 50
Name
RD0/PSP0
RD1/PSP1
RD2/PSP2
RD3/PSP3
RD4/PSP4
RD5/PSP5
RD6/PSP6
RD7/PSP7
Legend: ST = Schmitt Trigger input TTL = TTL input
Note 1: Input buffers are Schmitt Triggers when in I/O mode and TTL buffer when in Parallel Slave Port Mode.
Address Name
08h
88h
89h
Legend: x = unknown, u = unchanged, - = unimplemented read as '0'. Shaded cells are not used by PORTD.
PORTD and TRISD Registers
Applicable Devices
72 73 73A 74 74A 76 77
PORTD
TRISD
TRISE
Bit#
PORTD FUNCTIONS
bit0
bit1
bit2
bit3
bit4
bit5
bit6
bit7
SUMMARY OF REGISTERS ASSOCIATED WITH PORTD
PORTD Data Direction Register
Bit 7 Bit 6 Bit 5
RD7
IBF
OBF IBOV PSPMODE
RD6
Buffer Type
ST/TTL
ST/TTL
ST/TTL
ST/TTL
ST/TTL
ST/TTL
ST/TTL
ST/TTL
RD5
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
Bit 4
RD4
Input/output port pin or parallel slave port bit0
Input/output port pin or parallel slave port bit1
Input/output port pin or parallel slave port bit2
Input/output port pin or parallel slave port bit3
Input/output port pin or parallel slave port bit4
Input/output port pin or parallel slave port bit5
Input/output port pin or parallel slave port bit6
Input/output port pin or parallel slave port bit7
Bit 3
RD3
—
PORTE Data Direction Bits
Bit 2
RD2
FIGURE 5-7:
Note 1: I/O pins have protection diodes to V
Data
bus
WR
TRIS
WR
PORT
RD PORT
Bit 1
RD1
TRIS Latch
Function
Data Latch
D
D
CK
CK
RD TRIS
PORTD BLOCK DIAGRAM (IN
I/O PORT MODE)
Bit 0
RD0
Q
Q
1997 Microchip Technology Inc.
xxxx xxxx
1111 1111
0000 -111
Q
Value on:
POR,
BOR
EN
Schmitt
Trigger
input
buffer
EN
D
DD
other resets
Value on all
uuuu uuuu
1111 1111
0000 -111
and V
I/O pin
SS
(1)
.
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