PIC24FJ256GB108-I/PT Microchip Technology, PIC24FJ256GB108-I/PT Datasheet - Page 47
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PIC24FJ256GB108-I/PT
Manufacturer Part Number
PIC24FJ256GB108-I/PT
Description
IC PIC MCU FLASH 256K 80TQFP
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheets
1.PIC24FJ128GA106-IPT.pdf
(52 pages)
2.PIC24FJ64GB106-IPT.pdf
(16 pages)
3.PIC24FJ64GB106-IPT.pdf
(352 pages)
4.PIC24FJ192GB108-IPT.pdf
(328 pages)
Specifications of PIC24FJ256GB108-I/PT
Program Memory Type
FLASH
Program Memory Size
256KB (85.5K x 24)
Package / Case
80-TFQFP
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
65
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
I2C/SPI/UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
68
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DM240011
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARDDM240011 - KIT STARTER MPLAB FOR PIC24F MCUMA240014 - MODULE PLUG-IN PIC24
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24FJ256GB108-I/PT
Manufacturer:
MICROCHIP
Quantity:
1 000
Company:
Part Number:
PIC24FJ256GB108-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC24FJ256GB108-I/PT
Manufacturer:
MICROCH
Quantity:
20 000
6.2
Checksums for the PIC24FJXXXGA1/GB1 families are
16 bits in size. The checksum is calculated by summing
the following:
• Contents of code memory locations
• Contents of Configuration registers
TABLE 6-4:
© 2007 Microchip Technology Inc.
PIC24FJ128GA106
PIC24FJ192GA106
PIC24FJ256GA106
PIC24FJ128GA108
PIC24FJ192GA108
PIC24FJ256GA108
PIC24FJ128GA110
PIC24FJ192GA110
PIC24FJ256GA110
PIC24FJ64GB106
PIC24FJ128GB106
PIC24FJ192GB106
PIC24FJ256GB106
PIC24FJ64GB108
Legend:
Note:
Checksum Computation
Device
Item
SUM[a:b]
CFGB
TBD
CW1 address is last location of implemented program memory; CW2 is (last location – 2); CW3 is (last
location – 4).
CHECKSUM COMPUTATION
=
=
=
Description
Byte sum of locations, a to b inclusive (all 3 bytes of code memory)
CFGB = Configuration Block (masked) Byte sum of (CW1 & 0x7BDF + CW2 & 0xF7FF +
CW3 & 0xE1FF)
To Be Determined
Read Code
Protection
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Checksum Computation
CFGB + SUM(0:20BF9)
CFGB + SUM(0:2ABF9)
CFGB + SUM(0:20BF9)
CFGB + SUM(0:2ABF9)
CFGB + SUM(0:20BF9)
CFGB + SUM(0:2ABF9)
CFGB + SUM(0:20BF9)
CFGB + SUM(0:2ABF9)
CFGB + SUM(0:1F7F9)
CFGB + SUM(0:1F7F9)
CFGB + SUM(0:1F7F9)
CFGB + SUM(0:1F7F9)
CFGB + SUM(0:ABF9)
CFGB + SUM(0:ABF9)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
PIC24FJXXXGA1/GB1
Table 6-4 describes how to calculate the checksum for
each device. All memory locations are summed, one
byte at a time, using only their native data size. More
specifically, Configuration registers are summed by
adding the lower two bytes of these locations (the
upper byte is ignored), while code memory is summed
by adding all three bytes of code memory.
Checksum
Erased
Value
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
0xAAAAAA at 0x0
Checksum with
and Last Code
DS39907A-page 47
Address
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD