PIC17C43-33/P Microchip Technology, PIC17C43-33/P Datasheet - Page 122
![IC MCU OTP 4KX16 PWM 40DIP](/photos/6/61/66192/150-40-dip_sml.jpg)
PIC17C43-33/P
Manufacturer Part Number
PIC17C43-33/P
Description
IC MCU OTP 4KX16 PWM 40DIP
Manufacturer
Microchip Technology
Series
PIC® 17Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC17C42A-16P.pdf
(241 pages)
3.PIC17C43-16P.pdf
(4 pages)
Specifications of PIC17C43-33/P
Core Processor
PIC
Core Size
8-Bit
Speed
33MHz
Connectivity
UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
33
Program Memory Size
8KB (4K x 16)
Program Memory Type
OTP
Ram Size
454 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 6 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
40-DIP (0.600", 15.24mm)
Processor Series
PIC17C
Core
PIC
Data Bus Width
8 bit
Data Ram Size
454 B
Interface Type
SCI, USART
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
33
Number Of Timers
8
Operating Supply Voltage
2.5 V to 6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
Through Hole
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
0 C
For Use With
DVA17XP401 - DEVICE ADAPTER FOR PIC17C42AAC174001 - MODULE SKT PROMATEII 40DIP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC17C43-33/PQ
Manufacturer:
Microchip Technology
Quantity:
10 000
Company:
Part Number:
PIC17C43-33/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
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PIC17C4X
DCFSNZ
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
If skip:
Example:
DS30412C-page 122
Before Instruction
After Instruction
Forced NOP
Decode
TEMP_VALUE
TEMP_VALUE
If TEMP_VALUE
If TEMP_VALUE
Q1
Q1
PC
PC
register 'f'
Decrement f, skip if not 0
[ label ] DCFSNZ f,d
0
d
(f) – 1
skip if not 0
The contents of register 'f' are decre-
mented. If 'd' is 0 the result is placed in
WREG. If 'd' is 1 the result is placed
back in register 'f'.
If the result is not 0, the next instruction,
which is already fetched, is discarded,
and an NOP is executed instead mak-
ing it a two-cycle instruction.
1
1(2)
HERE
ZERO
NZERO
None
Read
NOP
0010
Q2
Q2
f
[0,1]
255
=
=
=
=
=
(dest);
DCFSNZ
:
:
011d
?
TEMP_VALUE - 1,
0;
Address (ZERO)
0;
Address (NZERO)
Execute
Execute
Q3
Q3
TEMP, 1
ffff
destination
Write to
NOP
Q4
Q4
ffff
GOTO
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
After Instruction
Forced NOP
Decode
PC =
Q1
Address (THERE)
Read literal
Unconditional Branch
[ label ]
0
k
k<12:8>
PC
None
GOTO allows an unconditional branch
anywhere within an 8K page boundary.
The thirteen bit immediate value is
loaded into PC bits <12:0>. Then the
upper eight bits of PC are loaded into
PCLATH. GOTO is always a two-cycle
instruction.
1
2
GOTO THERE
'k'<7:0>
NOP
110k
Q2
k
PC<12:0>;
1996 Microchip Technology Inc.
8191
GOTO k
kkkk
PCLATH<4:0>,
Execute
Execute
PCLATH<7:5>
Q3
kkkk
NOP
NOP
Q4
kkkk
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