PIC18F258-E/SO Microchip Technology, PIC18F258-E/SO Datasheet - Page 246
![IC MCU FLASH 16KX16 CAN 28-SOIC](/photos/6/59/65909/150-28-soic_sml.jpg)
PIC18F258-E/SO
Manufacturer Part Number
PIC18F258-E/SO
Description
IC MCU FLASH 16KX16 CAN 28-SOIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16C770-ISO.pdf
(8 pages)
3.PIC18LF242-ISO.pdf
(36 pages)
4.PIC18F248-ISO.pdf
(402 pages)
5.PIC18F248-ISO.pdf
(8 pages)
Specifications of PIC18F258-E/SO
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SOIC (7.5mm Width)
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1.5 KB
Interface Type
SPI, I2C, USART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
22
Number Of Timers
4 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163011, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
5 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F258-E/SO
Manufacturer:
MIC
Quantity:
20 000
- PIC16F616T-ISL PDF datasheet
- PIC16C770-ISO PDF datasheet #2
- PIC18LF242-ISO PDF datasheet #3
- PIC18F248-ISO PDF datasheet #4
- PIC18F248-ISO PDF datasheet #5
- Current page: 246 of 402
- Download datasheet (7Mb)
The value that is in the ADRESH/ADRESL registers is
not modified for a Power-on Reset. The ADRESH/
ADRESL registers will contain unknown data after a
Power-on Reset.
After the A/D module has been configured as desired,
the selected channel must be acquired before the
conversion is started. The analog input channels must
have their corresponding TRIS bits selected as an
input. To determine acquisition time, see Section 20.1
“A/D Acquisition Requirements”. After this acquisi-
tion time has elapsed, the A/D conversion can be
started. The following steps should be followed for
doing an A/D conversion:
1.
2.
3.
4.
5.
FIGURE 20-2:
DS41159E-page 244
PIC18FXX8
Configure the A/D module:
• Configure analog pins, voltage reference and
• Select A/D input channel (ADCON0)
• Select A/D conversion clock (ADCON0)
• Turn on A/D module (ADCON0)
Configure A/D interrupt (if desired):
• Clear ADIF bit
• Set ADIE bit
• Set GIE bit
Wait the required acquisition time.
Start conversion:
• Set GO/DONE bit (ADCON0)
Wait for A/D conversion to complete, by either:
• Polling for the GO/DONE bit to be cleared
OR
• Waiting for the A/D interrupt
digital I/O (ADCON1)
Legend: C
V
AIN
Rs
V
I
R
SS
C
LEAKAGE
T
PIN
IC
HOLD
ANx
ANALOG INPUT MODEL
C
5 pF
PIN
= input capacitance
= threshold voltage
= leakage current at the pin due to
= interconnect resistance
= sampling switch
= sample/hold capacitance (from DAC)
various junctions
V
DD
V
V
T
T
= 0.6V
= 0.6V
I
± 500 nA
LEAKAGE
6.
7.
20.1
For the A/D converter to meet its specified accuracy,
the charge holding capacitor (C
to fully charge to the input channel voltage level. The
analog input model is shown in Figure 20-2. The
source impedance (R
switch (R
required to charge the capacitor C
switch (R
(V
at the analog input (due to pin leakage current). The
maximum recommended impedance for analog
sources is 2.5 k . After the analog input channel is
selected (changed), this acquisition must be done
before the conversion can be started.
R
IC
DD
Note:
Read A/D Result registers (ADRESH/ADRESL);
clear bit ADIF if required.
For next conversion, go to step 1 or step 2 as
required. The A/D conversion time per bit is
defined as T
required before next acquisition starts.
1k
). The source impedance affects the offset voltage
A/D Acquisition Requirements
SS
V
SS
DD
SS
) impedance varies over the device voltage
When the conversion is started, the
holding capacitor is disconnected from the
input pin.
Sampling
Switch
) impedance directly affect the time
6V
5V
4V
3V
2V
R
SS
AD
. A minimum wait of 2 T
S
Sampling Switch
5 6 7 8 9 10 11
© 2006 Microchip Technology Inc.
) and the internal sampling
V
SS
C
HOLD
HOLD
= 120 pF
HOLD
) must be allowed
(k )
. The sampling
AD
is
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