PIC16LF874A-I/L Microchip Technology, PIC16LF874A-I/L Datasheet - Page 85

IC MCU FLASH 4KX14 EE A/D 44PLCC

PIC16LF874A-I/L

Manufacturer Part Number
PIC16LF874A-I/L
Description
IC MCU FLASH 4KX14 EE A/D 44PLCC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets

Specifications of PIC16LF874A-I/L

Core Size
8-Bit
Program Memory Size
7KB (4K x 14)
Core Processor
PIC
Speed
10MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
33
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Controller Family/series
PIC16LF
No. Of I/o's
33
Eeprom Memory Size
128Byte
Ram Memory Size
192Byte
Cpu Speed
20MHz
No. Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PIC16LF874A-I/LR
PIC16LF874A-I/LR
PIC16LF874AI/L

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16LF874A-I/L
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC16LF874A-I/L
Manufacturer:
MIC
Quantity:
20 000
REGISTER 9-5:
 2003 Microchip Technology Inc.
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
SSPCON2: MSSP CONTROL REGISTER 2 (I
bit 7
GCEN: General Call Enable bit (Slave mode only)
1 = Enable interrupt when a general call address (0000h) is received in the SSPSR
0 = General call address disabled
ACKSTAT: Acknowledge Status bit (Master Transmit mode only)
1 = Acknowledge was not received from slave
0 = Acknowledge was received from slave
ACKDT: Acknowledge Data bit (Master Receive mode only)
1 = Not Acknowledge
0 = Acknowledge
ACKEN: Acknowledge Sequence Enable bit (Master Receive mode only)
1 = Initiate Acknowledge sequence on SDA and SCL pins and transmit ACKDT data bit.
0 = Acknowledge sequence Idle
RCEN: Receive Enable bit (Master mode only)
1 = Enables Receive mode for I
0 = Receive Idle
PEN: Stop Condition Enable bit (Master mode only)
1 = Initiate Stop condition on SDA and SCL pins. Automatically cleared by hardware.
0 = Stop condition Idle
RSEN: Repeated Start Condition Enabled bit (Master mode only)
1 = Initiate Repeated Start condition on SDA and SCL pins. Automatically cleared by hardware.
0 = Repeated Start condition Idle
SEN: Start Condition Enabled/Stretch Enabled bit
In Master mode:
1 = Initiate Start condition on SDA and SCL pins. Automatically cleared by hardware.
0 = Start condition Idle
In Slave mode:
1 = Clock stretching is enabled for both slave transmit and slave receive (stretch enabled)
0 = Clock stretching is enabled for slave transmit only (PIC16F87X compatibility)
Legend:
R = Readable bit
- n = Value at POR
Note:
GCEN
R/W-0
Note:
Automatically cleared by hardware.
For bits ACKEN, RCEN, PEN, RSEN, SEN: If the I
this bit may not be set (no spooling) and the SSPBUF may not be written (or writes
to the SSPBUF are disabled).
Value that will be transmitted when the user initiates an Acknowledge sequence at
the end of a receive.
ACKSTAT
R/W-0
ACKDT
R/W-0
W = Writable bit
‘1’ = Bit is set
2
C
ACKEN
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
2
R/W-0
RCEN
C MODE) (ADDRESS 91h)
2
C module is not in the Idle mode,
PIC16F87XA
R/W-0
PEN
x = Bit is unknown
R/W-0
RSEN
DS39582B-page 83
R/W-0
SEN
bit 0

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