PIC16C73A-20E/SP Microchip Technology, PIC16C73A-20E/SP Datasheet - Page 218
![IC MCU OTP 4KX14 A/D PWM 28DIP](/photos/6/59/65908/150-28-dip_sml.jpg)
PIC16C73A-20E/SP
Manufacturer Part Number
PIC16C73A-20E/SP
Description
IC MCU OTP 4KX14 A/D PWM 28DIP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F818-ISO.pdf
(6 pages)
3.PIC16C72-04SO.pdf
(289 pages)
4.PIC16C73A-20SP.pdf
(8 pages)
Specifications of PIC16C73A-20E/SP
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
7KB (4K x 14)
Program Memory Type
OTP
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Data Converters
A/D 5x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
28-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
- PIC16F616T-ISL PDF datasheet
- PIC16F818-ISO PDF datasheet #2
- PIC16C72-04SO PDF datasheet #3
- PIC16C73A-20SP PDF datasheet #4
- Current page: 218 of 289
- Download datasheet (3Mb)
PIC16C7X
FIGURE 19-14: A/D CONVERSION TIMING
TABLE 19-14: A/D CONVERSION REQUIREMENTS
DS30390E-page 218
Applicable Devices 72 73 73A 74 74A 76 77
Note 1: ADRES register may be read on the following T
Param
No.
130
131
132
134
135
Note 1: If the A/D clock source is selected as RC, a time of T
*
†
§
2: See Section 13.1 for min conditions.
A/D DATA
SAMPLE
A/D CLK
T
T
T
ADRES
Sym Characteristic
T
T
These parameters are characterized but not tested.
Data in “Typ” column is at 5V, 25 C unless otherwise stated. These parameters are for design guidance only and are not
tested.
This specification ensured by design.
BSF ADCON0, GO
SWC
CNV
ACQ
GO
AD
ADIF
GO
Q4
SLEEP instruction to be executed.
A/D clock period
Conversion time (not including S/H time)
(Note 1)
Acquisition time
Q4 to A/D clock start
Switching from convert
134
132
(T
OSC
PIC16C73A/74A
PIC16LC73A/74A
PIC16C73A/74A
PIC16LC73A/74A
/2)
7
sample time
(1)
6
OLD_DATA
CY
5
Note 2
cycle.
1.5 §
SAMPLING STOPPED
Min
1.6
2.0
2.0
3.0
—
5*
—
4
CY
T
131
130
is added before the A/D clock starts. This allows the
OSC
Typ†
4.0
6.0
9.5
20
—
—
—
—
3
/2 §
2
Max
6.0
9.0
—
—
—
—
—
—
—
1
Units
T
T
—
AD
AD
s
s
s
s
s
s
1 T
0
T
T
A/D RC Mode
A/D RC Mode
The minimum time is the amplifier
settling time. This may be used if
the "new" input voltage has not
changed by more than 1 LSb (i.e.,
20.0 mV @ 5.12V) from the last
sampled voltage (as stated on
C
If the A/D clock source is selected
as RC, a time of T
before the A/D clock starts. This
allows the SLEEP instruction to be
executed.
OSC
OSC
HOLD
1997 Microchip Technology Inc.
CY
based, V
based, V
).
NEW_DATA
DONE
Conditions
REF
REF
CY
full range
3.0V
is added
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