AT32UC3B0256-Z2UR Atmel, AT32UC3B0256-Z2UR Datasheet - Page 332

• Manufacturer Part Number: AT32UC3B0256-Z2UR
• Description: MCU AVR32 256K FLASH 64-QFN
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3B0256-Z2UR

• Package / Case: 64-QFN
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 60MHz
• Number Of I /o: 44
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Program Memory Size: 256KB (256K x 8)
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Connectivity: I²C, IrDA, SPI, SSC, UART/USART, USB
• Core Size: 32-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

21.6.7
32059J–12/2010
Modem Mode
The USART features modem mode, which enables control of the signals: DTR (Data Terminal
Ready), DSR (Data Set Ready), RTS (Request to Send), CTS (Clear to Send), DCD (Data Car-
rier Detect) and RI (Ring Indicator). While operating in modem mode, the USART behaves as a
DTE (Data Terminal Equipment) as it drives DTR and RTS and can detect level change on DSR,
DCD, CTS and RI.
Setting the USART in modem mode is performed by writing the MODE field in the Mode Regis-
ter (MR) to the value 0x3. While operating in modem mode the USART behaves as though in
asynchronous mode and all the parameter configurations are available.
Table 21-12
Table 21-12. Circuit References
The control of the DTR output pin is performed by writing the Control Register (CR) with the
DTRDIS and DTREN bits respectively at 1. The disable command forces the corresponding pin
to its inactive level, i.e. high. The enable command forces the corresponding pin to its active
level, i.e. low. RTS output pin is automatically controlled in this mode
The level changes are detected on the RI, DSR, DCD and CTS pins. If an input change is
detected, the RIIC, DSRIC, DCDIC and CTSIC bits in the Channel Status Register (CSR) are set
respectively and can trigger an interrupt. The status is automatically cleared when CSR is read.
Furthermore, the CTS automatically disables the transmitter when it is detected at its inactive
state. If a character is being transmitted when the CTS rises, the character transmission is com-
pleted before the transmitter is actually disabled.
USART Pin
TXD
RTS
DTR
RXD
CTS
DSR
DCD
RI
gives the correspondence of the USART signals with modem connection standards.
V24
2
4
20
3
5
6
8
22
CCITT
103
105
108.2
104
106
107
109
125
Direction
From terminal to modem
From terminal to modem
From terminal to modem
From modem to terminal
From terminal to modem
From terminal to modem
From terminal to modem
From terminal to modem
AT32UC3B
332