ATMEGA169PV-8MU Atmel, ATMEGA169PV-8MU Datasheet - Page 75
ATMEGA169PV-8MU
Manufacturer Part Number
ATMEGA169PV-8MU
Description
IC AVR MCU 16K 8MHZ 1.8V 64-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA169PV-8MU
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-MLF®, 64-QFN
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
8MHz
Interface Type
SPI/USART/USI
Total Internal Ram Size
1KB
# I/os (max)
54
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
2.5/3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
1.8V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
64
Package Type
MLF EP
Processor Series
ATMEGA16x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
54
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
For Use With
ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATAVRBFLY - KIT EVALUATION AVR BUTTERFLYATSTK502 - MOD EXPANSION AVR STARTER 500ATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA169PV-8MU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
ATMEGA169PV-8MUR
Manufacturer:
LISHENG
Quantity:
1 000
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- Download datasheet (9Mb)
ATmega169P
• OC1B/PCINT14, Bit 6
OC1B, Output Compare Match B output: The PB6 pin can serve as an external output for the
Timer/Counter1 Output Compare B. The pin has to be configured as an output (DDB6 set (one))
to serve this function. The OC1B pin is also the output pin for the PWM mode timer function.
PCINT14, Pin Change Interrupt Source 14: The PB6 pin can serve as an external interrupt
source.
• OC1A/PCINT13, Bit 5
OC1A, Output Compare Match A output: The PB5 pin can serve as an external output for the
Timer/Counter1 Output Compare A. The pin has to be configured as an output (DDB5 set (one))
to serve this function. The OC1A pin is also the output pin for the PWM mode timer function.
PCINT13, Pin Change Interrupt Source 13: The PB5 pin can serve as an external interrupt
source.
• OC0A/PCINT12, Bit 4
OC0A, Output Compare Match A output: The PB4 pin can serve as an external output for the
Timer/Counter0 Output Compare A. The pin has to be configured as an output (DDB4 set (one))
to serve this function. The OC0A pin is also the output pin for the PWM mode timer function.
PCINT12, Pin Change Interrupt Source 12: The PB4 pin can serve as an external interrupt
source.
• MISO/PCINT11 – Port B, Bit 3
MISO: Master Data input, Slave Data output pin for SPI. When the SPI is enabled as a Master,
this pin is configured as an input regardless of the setting of DDB3. When the SPI is enabled as
a Slave, the data direction of this pin is controlled by DDB3. When the pin is forced to be an
input, the pull-up can still be controlled by the PORTB3 bit.
PCINT11, Pin Change Interrupt Source 11: The PB3 pin can serve as an external interrupt
source.
• MOSI/PCINT10 – Port B, Bit 2
MOSI: SPI Master Data output, Slave Data input for SPI. When the SPI is enabled as a Slave,
this pin is configured as an input regardless of the setting of DDB2. When the SPI is enabled as
a Master, the data direction of this pin is controlled by DDB2. When the pin is forced to be an
input, the pull-up can still be controlled by the PORTB2 bit.
PCINT10, Pin Change Interrupt Source 10: The PB2 pin can serve as an external interrupt
source.
• SCK/PCINT9 – Port B, Bit 1
SCK: Master Clock output, Slave Clock input pin for SPI. When the SPI is enabled as a Slave,
this pin is configured as an input regardless of the setting of DDB1. When the SPI is enabled as
a Master, the data direction of this pin is controlled by DDB1. When the pin is forced to be an
input, the pull-up can still be controlled by the PORTB1 bit.
PCINT9, Pin Change Interrupt Source 9: The PB1 pin can serve as an external interrupt source.
• SS/PCINT8 – Port B, Bit 0
SS: Slave Port Select input. When the SPI is enabled as a Slave, this pin is configured as an
input regardless of the setting of DDB0. As a Slave, the SPI is activated when this pin is driven
75
8018P–AVR–08/10
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