ATMEGA6490A-AU Atmel, ATMEGA6490A-AU Datasheet - Page 5

• Manufacturer Part Number: ATMEGA6490A-AU
• Description: IC MCU AVR 64K FLASH 100TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA6490A-AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TFQFP
• Processor Series: ATmega
• Core: AVR
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: SPI, USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 69
• Number Of Timers: 3
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Operating Temperature Range: - 40 C to + 85 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

2. Overview
The ATmega169A/169PA/329A/329PA/3290A/3290PA/649A/649P/6490A/6490P is a low-power CMOS 8-bit microcon-
troller based on the Ateml
the ATmega169A/169PA/329A/329PA/3290A/3290PA/649A/649P/6490A/6490P achieves throughputs approaching 1
MIPS per MHz allowing the system designer to optimize power consumption versus processing speed.
2.1
Figure 2-1.
8284AS–AVR–10/10
AREF
AVCC
AGND
GND
Block Diagram
Block Diagram
VCC
ON-CHIP DEBUG
PROGRAMMING
BOUNDARY-
®
JTAG TAP
The AVR core combines a rich instruction set with 32 general purpose working registers. All the
32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent
registers to be accessed in one single instruction executed in one clock cycle. The resulting
LOGIC
AVR
SCAN
ATmega169A/169PA/329A/329PA/649A/649P/3290A/3290PA/6490A/6490P
DATA REGISTER
DATA REGISTER
®
USART
PORTE
PORTF
enhanced RISC architecture. By executing powerful instructions in a single clock cycle,
AVR CPU
PORTF DRIVERS
PORTE DRIVERS
PF0 - PF7
PE0 - PE7
INSTRUCTION
INSTRUCTION
PROGRAM
PROGRAM
REGISTER
COUNTER
CONTROL
DECODER
SERIAL INTERFACE
FLASH
LINES
ADC
REG. PORTE
REG. PORTF
UNIVERSAL
DATA DIR.
DATA DIR.
DATA REGISTER
REGISTERS
REGISTER
GENERAL
PURPOSE
POINTER
STATUS
STACK
SRAM
PORTB
DATA REGISTER
ALU
X
Y
Z
PORTA
PORTB DRIVERS
PB0 - PB7
PORTA DRIVERS
PA0 - PA7
REG. PORTB
DATA DIR.
REG. PORTA
DATA DIR.
MCU CONTROL
OSCILLATOR
WATCHDOG
INTERRUPT
COUNTERS
INTERNAL
REGISTER
EEPROM
TIMER/
TIMER
UNIT
SPI
8-BIT DATA BUS
DATA REGISTER
PORTD
DATA REGISTER
PORTD DRIVERS
PD0 - PD7
PORTC
OSCILLATOR
TIMING AND
CALIB. OSC
CONTROL
PORTC DRIVERS
REG. PORTD
PC0 - PC7
DATA DIR.
REG. PORTC
DATA DIR.
CONTROLLER/
DRIVER
LCD
DATA REG.
PORTG
PORTG DRIVERS
PG0 - PG4
REG. PORTG
DATA DIR.
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