AT90CAN32-16AU Atmel, AT90CAN32-16AU Datasheet - Page 351

• Manufacturer Part Number: AT90CAN32-16AU
• Description: IC MCU AVR 32K FLASH 64-TQFP
• Manufacturer: Atmel
• Series: AVR® 90CANr

Specifications of AT90CAN32-16AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: CAN, EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Processor Series: AT90CANx
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: 2-Wire/SPI/USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 4
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATDVK90CAN1, ATADAPCAN01
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• No. Of I/o's: 53
• Eeprom Memory Size: 1KB
• Ram Memory Size: 2KB
• Cpu Speed: 16MHz
• No. Of Timers: 4
• Rohs Compliant: Yes
• For Use With: ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATDVK90CAN1 - KIT DEV FOR AT90CAN128 MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 25-15. Serial Programming Instruction Set
7679H–CAN–08/08
Instruction
Programming
Enable
Chip Erase
Read
Program Memory
Load
Program Memory
Page
Write
Program Memory
Page
Read
EEPROM Memory
Write
EEPROM Memory
Set
a = address high bits, b = address low bits, H = 0 - Low byte, 1 - High Byte, o = data out, i = data in, x = don’t care
1010 1100 0101 0011 xxxx xxxx xxxx xxxx Enable Serial Programming after RESET goes low.
1010 1100 100x xxxx xxxx xxxx xxxx xxxx Chip Erase EEPROM and Flash.
0010 H000 aaaa aaaa bbbb bbbb oooo oooo
0100 H000 000x xxxx xbbb bbbb iiii iiii
0100 1100 aaaa aaaa bxxx xxxx xxxx xxxx Write Program Memory Page at address a:b.
1010 0000 000x aaaa bbbb bbbb oooo oooo Read data o from EEPROM memory at address a:b.
1100 0000 000x aaaa bbbb bbbb iiii iiii Write data i to EEPROM memory at address a:b.
Byte 1
are meant to contain 0xFF, can be skipped. This does not apply if the EEPROM is re-pro-
grammed without chip erasing the device. In this case, data polling cannot be used for the value
0xFF, and the user will have to wait at least t
Table 25-14
Table 25-14. Minimum Wait Delay Before Writing the Next Flash or EEPROM Location
Figure 25-8. Serial Programming Waveforms
Symbol
t
t
t
t
WD_FUSE
WD_FLASH
WD_EEPROM
WD_ERASE
SERIAL DA TA OUTPUT
SERIAL CLOCK INPUT
Byte 2
Instruction Format
SERIAL DA TA INPUT
for t
(2)
WD_EEPROM
(MISO-PDO)
(MOSI-PDI)
Sample
(SCK)
Byte 3
value.
(1)
MSB
MSB
Byte4
WD_EEPROM
Operation
Read H (high or low) data o from Program memory at
word address a:b.
Write H (high or low) data i to Program Memory page
at word address b. Data low byte must be loaded
before Data high byte is applied within the same
address.
Minimum Wait Delay
(1)
before programming the next byte. See
AT90CAN32/64/128
4.5 ms
4.5 ms
9.0 ms
9.0 ms
LSB
LSB
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