PIC18F452-E/P Microchip Technology, PIC18F452-E/P Datasheet - Page 48
![IC MCU CMOS 40MHZ 16K FLSH 40DIP](/photos/6/61/66192/150-40-dip_sml.jpg)
PIC18F452-E/P
Manufacturer Part Number
PIC18F452-E/P
Description
IC MCU CMOS 40MHZ 16K FLSH 40DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F242-ISO.pdf
(332 pages)
3.PIC18F242-ISO.pdf
(14 pages)
4.PIC18F242-ISO.pdf
(16 pages)
5.PIC18F242-ISO.pdf
(16 pages)
6.PIC18F242-ISO.pdf
(14 pages)
7.PIC18LF242-ISO.pdf
(36 pages)
8.PIC18F452-EP.pdf
(332 pages)
Specifications of PIC18F452-E/P
Program Memory Type
FLASH
Program Memory Size
32KB (16K x 16)
Package / Case
40-DIP (0.600", 15.24mm)
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
34
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1.5 KB
Interface Type
MSSP/SPI/I2C/PSP/USART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
34
Number Of Timers
4
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163022
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Package
40PDIP
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
ACICE0206 - ADAPTER MPLABICE 40P 600 MIL
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F452-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC18F242-ISO PDF datasheet #2
- PIC18F242-ISO PDF datasheet #3
- PIC18F242-ISO PDF datasheet #4
- PIC18F242-ISO PDF datasheet #5
- PIC18F242-ISO PDF datasheet #6
- PIC18LF242-ISO PDF datasheet #7
- PIC18F452-EP PDF datasheet #8
- Current page: 48 of 332
- Download datasheet (6Mb)
PIC18FXX2
TABLE 4-2:
DS39564B-page 46
TOSU
TOSH
TOSL
STKPTR
PCLATU
PCLATH
PCL
TBLPTRU
TBLPTRH
TBLPTRL
TABLAT
PRODH
PRODL
INTCON
INTCON2
INTCON3
INDF0
POSTINC0 Uses contents of FSR0 to address data memory - value of FSR0 post-incremented (not a physical register)
POSTDEC0 Uses contents of FSR0 to address data memory - value of FSR0 post-decremented (not a physical register)
PREINC0
PLUSW0
FSR0H
FSR0L
WREG
INDF1
POSTINC1 Uses contents of FSR1 to address data memory - value of FSR1 post-incremented (not a physical register)
POSTDEC1 Uses contents of FSR1 to address data memory - value of FSR1 post-decremented (not a physical register)
PREINC1
PLUSW1
FSR1H
FSR1L
BSR
INDF2
POSTINC2 Uses contents of FSR2 to address data memory - value of FSR2 post-incremented (not a physical register)
POSTDEC2 Uses contents of FSR2 to address data memory - value of FSR2 post-decremented (not a physical register)
PREINC2
PLUSW2
FSR2H
FSR2L
STATUS
TMR0H
TMR0L
T0CON
Legend:
Note 1:
File Name
2: Bit 21 of the TBLPTRU allows access to the device configuration bits.
3: These registers and bits are reserved on the PIC18F2X2 devices; always maintain these clear.
x = unknown, u = unchanged, - = unimplemented, q = value depends on condition
RA6 and associated bits are configured as port pins in RCIO and ECIO Oscillator mode only and read '0' in all other Oscillator modes.
Top-of-Stack High Byte (TOS<15:8>)
Top-of-Stack Low Byte (TOS<7:0>)
Holding Register for PC<15:8>
PC Low Byte (PC<7:0>)
Program Memory Table Pointer High Byte (TBLPTR<15:8>)
Program Memory Table Pointer Low Byte (TBLPTR<7:0>)
Program Memory Table Latch
Product Register High Byte
Product Register Low Byte
Uses contents of FSR0 to address data memory - value of FSR0 not changed (not a physical register)
Uses contents of FSR0 to address data memory - value of FSR0 pre-incremented (not a physical register)
Uses contents of FSR0 to address data memory - value of FSR0 (not a physical register).
Offset by value in WREG.
Indirect Data Memory Address Pointer 0 Low Byte
Working Register
Uses contents of FSR1 to address data memory - value of FSR1 not changed (not a physical register)
Uses contents of FSR1 to address data memory - value of FSR1 pre-incremented (not a physical register)
Uses contents of FSR1 to address data memory - value of FSR1 (not a physical register).
Offset by value in WREG.
Indirect Data Memory Address Pointer 1 Low Byte
Uses contents of FSR2 to address data memory - value of FSR2 not changed (not a physical register)
Uses contents of FSR2 to address data memory - value of FSR2 pre-incremented (not a physical register)
Uses contents of FSR2 to address data memory - value of FSR2 (not a physical register).
Offset by value in WREG.
Indirect Data Memory Address Pointer 2 Low Byte
Timer0 Register High Byte
Timer0 Register Low Byte
GIE/GIEH
TMR0ON
STKFUL
INT2IP
RBPU
Bit 7
—
—
—
—
—
—
—
—
REGISTER FILE SUMMARY
PEIE/GIEL
INTEDG0
STKUNF
T08BIT
INT1IP
Bit 6
—
—
—
—
—
—
—
—
INTEDG1
TMR0IE
bit21
T0CS
Bit 5
—
—
—
—
—
—
—
—
—
(2)
Top-of-Stack upper Byte (TOS<20:16>)
Return Stack Pointer
Holding Register for PC<20:16>
Program Memory Table Pointer Upper Byte (TBLPTR<20:16>) --00 0000
INTEDG2
INT0IE
INT2IE
T0SE
Bit 4
—
—
—
—
N
Indirect Data Memory Address Pointer 0 High Byte ---- 0000
Indirect Data Memory Address Pointer 1 High Byte ---- 0000
Bank Select Register
Indirect Data Memory Address Pointer 2 High Byte ---- 0000
INT1IE
RBIE
Bit 3
PSA
OV
—
TMR0IP
TMR0IF
T0PS2
Bit 2
—
Z
INT0IF
INT2IF
T0PS1
Bit 1
DC
—
INT1IF
T0PS0
2002 Microchip Technology Inc.
RBIP
RBIF
Bit 0
C
---0 0000
0000 0000
0000 0000
00-0 0000
---0 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
xxxx xxxx
xxxx xxxx
0000 000x
1111 -1-1
11-0 0-00
xxxx xxxx
xxxx xxxx
xxxx xxxx
---- 0000
xxxx xxxx
---x xxxx
0000 0000
xxxx xxxx
1111 1111
POR, BOR
Value on
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
on page:
Details
105
105
103
n/a
37
37
37
38
39
39
39
58
58
58
58
71
71
75
76
77
50
50
50
50
50
50
50
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