PIC24HJ64GP210-I/PT Microchip Technology, PIC24HJ64GP210-I/PT Datasheet - Page 66
![IC PIC MCU FLASH 32KX16 100TQFP](/photos/12/13/121330/c04-100-tqfp_sml.jpg)
PIC24HJ64GP210-I/PT
Manufacturer Part Number
PIC24HJ64GP210-I/PT
Description
IC PIC MCU FLASH 32KX16 100TQFP
Manufacturer
Microchip Technology
Series
PIC® 24Hr
Datasheets
1.PIC24HJ12GP201-ISO.pdf
(84 pages)
2.PIC24HJ64GP206-IPT.pdf
(292 pages)
3.PIC24HJ64GP206-IPT.pdf
(8 pages)
4.PIC24HJ64GP206-IPT.pdf
(20 pages)
5.PIC24HJ64GP206-IPT.pdf
(26 pages)
6.PIC24HJ128GP306-IPT.pdf
(288 pages)
Specifications of PIC24HJ64GP210-I/PT
Core Size
16-Bit
Program Memory Size
64KB (22K x 24)
Core Processor
PIC
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
85
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 32x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFQFP
Controller Family/series
PIC24
No. Of I/o's
85
Ram Memory Size
8KB
Cpu Speed
40MIPS
No. Of Timers
13
No. Of Pwm Channels
8
Embedded Interface Type
I2C, SPI, UART
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARDAC164333 - MODULE SKT FOR PM3 100QFPDM300024 - KIT DEMO DSPICDEM 1.1MA240012 - MODULE PLUG-IN PIC24H 100QFPDV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24HJ64GP210-I/PT
Manufacturer:
MICROCHIP
Quantity:
12 000
Company:
Part Number:
PIC24HJ64GP210-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC24HJ12GP201-ISO PDF datasheet
- PIC24HJ64GP206-IPT PDF datasheet #2
- PIC24HJ64GP206-IPT PDF datasheet #3
- PIC24HJ64GP206-IPT PDF datasheet #4
- PIC24HJ64GP206-IPT PDF datasheet #5
- PIC24HJ128GP306-IPT PDF datasheet #6
- Current page: 66 of 288
- Download datasheet (5Mb)
PIC24H
TABLE 5-1:
5.1
If clock switching is enabled, the system clock source at
device Reset is chosen, as shown in Table 5-2. If clock
switching is disabled, the system clock source is always
selected according to the oscillator Configuration bits.
Refer to Section 8.0 “Oscillator Configuration” for
further details.
TABLE 5-2:
DS70175C-page 64
TRAPR (RCON<15>)
IOPUWR (RCON<14>)
EXTR (RCON<7>)
SWR (RCON<6>)
WDTO (RCON<4>)
SLEEP (RCON<3>)
IDLE (RCON<2>)
BOR (RCON<1>)
POR (RCON<0>)
Note:
Reset Type
WDTR
MCLR
SWR
POR
BOR
Clock Source Selection at Reset
All Reset flag bits may be set or cleared by the user software.
Flag Bit
Oscillator Configuration bits
(FNOSC<2:0>)
COSC Control bits
(OSCCON<14:12>)
RESET FLAG BIT OPERATION
OSCILLATOR SELECTION vs.
TYPE OF RESET (CLOCK
SWITCHING ENABLED)
Clock Source Determinant
MCLR Reset
BOR
POR
Trap conflict event
Illegal opcode or uninitialized
W register access
RESET instruction
WDT time-out
PWRSAV #SLEEP instruction
PWRSAV #IDLE instruction
Preliminary
Setting Event
5.2
The Reset times for various types of device Reset are
summarized in Table 5-3. The system Reset signal is
released after the POR and PWRT delay times expire.
The time at which the device actually begins to execute
code also depends on the system oscillator delays,
which include the Oscillator Start-up Timer (OST) and
the PLL lock time. The OST and PLL lock times occur
in parallel with the applicable reset delay times.
The FSCM delay determines the time at which the
FSCM begins to monitor the system clock source after
the reset signal is released.
Device Reset Times
—
—
POR
POR
POR
POR
PWRSAV instruction, POR
POR
POR
© 2006 Microchip Technology Inc.
Clearing Event
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