PIC16F874-04/PT Microchip Technology, PIC16F874-04/PT Datasheet - Page 17
![IC MCU FLASH 4KX14 EE 44TQFP](/photos/6/82/68251/c04-076_pt_sml.jpg)
PIC16F874-04/PT
Manufacturer Part Number
PIC16F874-04/PT
Description
IC MCU FLASH 4KX14 EE 44TQFP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16F873-04SO.pdf
(218 pages)
4.PIC16F873-04SO.pdf
(5 pages)
5.PIC16F873-04SO.pdf
(5 pages)
Specifications of PIC16F874-04/PT
Core Size
8-Bit
Program Memory Size
7KB (4K x 14)
Oscillator Type
External
Core Processor
PIC
Speed
4MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
33
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b
Operating Temperature
0°C ~ 70°C
Package / Case
44-TQFP, 44-VQFP
Controller Family/series
PIC16F
No. Of I/o's
33
Eeprom Memory Size
128Byte
Ram Memory Size
192Byte
Cpu Speed
4MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16F874-04/PT
Manufacturer:
MICROCHIP
Quantity:
4 500
Company:
Part Number:
PIC16F874-04/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
2.2.2
The Special Function Registers are registers used by
the CPU and peripheral modules for controlling the
desired operation of the device. These registers are
implemented as static RAM. A list of these registers is
given in Table 2-1.
TABLE 2-1:
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
1Bh
1Ch
1Dh
1Eh
1Fh
Legend:
Note 1: The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<12:8> whose
Address
Bank 0
2001 Microchip Technology Inc.
(3)
(3)
(3)
(3)
(4)
(4)
(1,3)
(3)
2: Bits PSPIE and PSPIF are reserved on PIC16F873/876 devices; always maintain these bits clear.
3: These registers can be addressed from any bank.
4: PORTD, PORTE, TRISD, and TRISE are not physically implemented on PIC16F873/876 devices; read as ‘0’.
5: PIR2<6> and PIE2<6> are reserved on these devices; always maintain these bits clear.
contents are transferred to the upper byte of the program counter.
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as '0', r = reserved.
Shaded locations are unimplemented, read as ‘0’.
INDF
TMR0
PCL
STATUS
FSR
PORTA
PORTB
PORTC
PORTD
PORTE
PCLATH
INTCON
PIR1
PIR2
TMR1L
TMR1H
T1CON
TMR2
T2CON
SSPBUF
SSPCON
CCPR1L
CCPR1H
CCP1CON
RCSTA
TXREG
RCREG
CCPR2L
CCPR2H
CCP2CON
ADRESH
ADCON0
SPECIAL FUNCTION REGISTERS
Name
SPECIAL FUNCTION REGISTER SUMMARY
Addressing this location uses contents of FSR to address data memory (not a physical register)
Timer0 Module Register
Program Counter (PC) Least Significant Byte
Indirect Data Memory Address Pointer
PORTB Data Latch when written: PORTB pins when read
PORTC Data Latch when written: PORTC pins when read
PORTD Data Latch when written: PORTD pins when read
Holding register for the Least Significant Byte of the 16-bit TMR1 Register
Holding register for the Most Significant Byte of the 16-bit TMR1 Register
Timer2 Module Register
Synchronous Serial Port Receive Buffer/Transmit Register
Capture/Compare/PWM Register1 (LSB)
Capture/Compare/PWM Register1 (MSB)
USART Transmit Data Register
USART Receive Data Register
Capture/Compare/PWM Register2 (LSB)
Capture/Compare/PWM Register2 (MSB)
A/D Result Register High Byte
PSPIF
ADCS1
WCOL
SPEN
Bit 7
GIE
IRP
—
—
—
—
—
—
—
—
(3)
TOUTPS3 TOUTPS2 TOUTPS1
SSPOV
ADCS0
PEIE
ADIF
Bit 6
RP1
RX9
(5)
—
—
—
—
—
—
PORTA Data Latch when written: PORTA pins when read
T1CKPS1
SSPEN
CCP1X
CCP2X
SREN
CHS2
RCIF
Bit 5
T0IE
RP0
—
—
—
Write Buffer for the upper 5 bits of the Program Counter
T1CKPS0
CCP1Y
CCP2Y
CREN
CHS1
INTE
EEIF
Bit 4
TXIF
CKP
TO
—
T1OSCEN
TOUTPS0
CCP1M3
CCP2M3
SSPM3
ADDEN
SSPIF
BCLIF
CHS0
The Special Function Registers can be classified into
two sets: core (CPU) and peripheral. Those registers
associated with the core functions are described in
detail in this section. Those related to the operation of
the peripheral features are described in detail in the
peripheral features section.
Bit 3
RBIE
PD
—
GO/DONE
TMR2ON
CCP1M2
CCP2M2
T1SYNC
CCP1IF
SSPM2
FERR
Bit 2
RE2
T0IF
—
Z
T2CKPS1 T2CKPS0 -000 0000
TMR1CS
CCP1M1
CCP2M1
TMR2IF
SSPM1
OERR
Bit 1
INTF
RE1
DC
—
—
PIC16F87X
TMR1ON --00 0000
CCP1M0
CCP2M0
TMR1IF
CCP2IF
SSPM0
ADON
RX9D
RBIF
Bit 0
RE0
C
DS30292C-page 15
0000 0000
xxxx xxxx
0000 0000
0001 1xxx
xxxx xxxx
--0x 0000
xxxx xxxx
xxxx xxxx
xxxx xxxx
---- -xxx
---0 0000
0000 000x
0000 0000
-r-0 0--0
xxxx xxxx
xxxx xxxx
0000 0000
xxxx xxxx
0000 0000
xxxx xxxx
xxxx xxxx
--00 0000
0000 000x
0000 0000
0000 0000
xxxx xxxx
xxxx xxxx
--00 0000
xxxx xxxx
0000 00-0
Value on:
POR,
BOR
Details
70, 73
page:
101
116
111
on
27
47
26
18
27
29
31
33
35
36
26
20
22
24
52
52
51
55
55
67
57
57
58
96
99
57
57
58