PIC18F4523-I/PT Microchip Technology, PIC18F4523-I/PT Datasheet - Page 110

• Manufacturer Part Number: PIC18F4523-I/PT
• Description: IC PIC MCU FLASH 16KX16 44TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4523-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 32KB (16K x 16)
• Package / Case: 44-TQFP, 44-VQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 36
• Eeprom Size: 256 x 8
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 13x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1.5 KB
• Interface Type: EUSART/I2C/MSSP/SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, 53275-917, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 13-ch x 12-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164305 - MODULE SKT FOR PM3 44TQFP444-1001 - DEMO BOARD FOR PICMICRO MCUAC164020 - MODULE SKT PROMATEII 44TQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F2423/2523/4423/4523
10.2
PORTB is an 8-bit wide, bidirectional port. The corre-
sponding data direction register is TRISB. Setting a
TRISB bit (= 1) will make the corresponding PORTB
pin an input (i.e., put the corresponding output driver in
a high-impedance mode). Clearing a TRISB bit (= 0)
will make the corresponding PORTB pin an output (i.e.,
put the contents of the output latch on the selected pin).
The Data Latch register (LATB) is also memory
mapped. Read-modify-write operations on the LATB
register read and write the latched output value for
PORTB.
EXAMPLE 10-2:
Each of the PORTB pins has a weak internal pull-up. A
single control bit can turn on pull-ups for all digital input
pins. This is performed by clearing bit, RBPU
(INTCON2<7>). The weak pull-up is automatically
turned off when the port pin is configured as a digital
output or an analog input. The pull-ups are disabled on
a Power-on Reset.
DS39755B-page 108
CLRF
CLRF
MOVLW
MOVWF
MOVLW
MOVWF
Note:
PORTB, TRISB and LATB
Registers
PORTB
LATB
0Fh
ADCON1 ; digital I/O pins
0CFh
TRISB
On a Power-on Reset, RB4:RB0 are
configured as analog inputs by default and
read as ‘0’; RB7:RB5 are configured as
digital inputs.
By programming the Configuration bit,
PBADEN, RB4:RB0 will alternatively be
configured as digital inputs on POR.
; Initialize PORTB by
; clearing output
; data latches
; Alternate method
; to clear output
; data latches
; Set RB<4:0> as
; (required if config bit
; PBADEN is set)
; Value used to
; initialize data
; direction
; Set RB<3:0> as inputs
; RB<5:4> as outputs
; RB<7:6> as inputs
INITIALIZING PORTB
Preliminary
Four of the PORTB pins (RB7:RB4) have an interrupt-
on-change feature, also known as a Keyboard Interrupt
(KBI3:KBI0). Only pins configured as inputs can cause
this interrupt to occur (i.e., any RB7:RB4 pin configured
as an output is excluded from the interrupt-on-change
comparison). The input pins (of RB7:RB4) are
compared with the old value latched on the last read of
PORTB. The “mismatch” outputs of RB7:RB4 are
ORed together to generate the RB Port Change
Interrupt with Flag bit, RBIF (INTCON<0>).
This interrupt can wake the device from the Sleep
mode, or any of the Idle modes. The user, in the
Interrupt Service Routine, can clear the interrupt in the
following manner:
a)
b)
A mismatch condition will continue to set flag bit, RBIF.
Reading PORTB will end the mismatch condition and
allow flag bit, RBIF, to be cleared.
The interrupt-on-change feature is recommended for
wake-up on key depression operation and operations
where PORTB is only used for the interrupt-on-change
feature. Polling of PORTB is not recommended while
using the interrupt-on-change feature.
RB3 can be configured by the Configuration bit,
CCP2MX, as the alternate peripheral pin for the CCP2
module (CCP2MX = 0).
RB7:RB5 are used during device programming as
PGD:PGC:PGM pins, respectively. See Section 23.7
“In-Circuit Serial Programming”, Section 23.8 “In-
Circuit Debugger” and Section 23.9 “Single-Supply
ICSP Programming” for details.
RB2:RB0 offer external interrupt inputs (INT2:INT0,
respectively). See Section 9.6 “INTn Pin Interrupts”
for details.
RB0 offers an input (FLT0) for use when ECCP1 is using
an external Fault input to disable ECCP1 Faults. See
Section 16.4.7 “Enhanced PWM Auto-Shutdown” for
details.
Any read or write of PORTB (except with the
MOVFF (ANY), PORTB instruction).
Clear flag bit, RBIF.
© 2007 Microchip Technology Inc.