PIC18F4680-E/P Microchip Technology, PIC18F4680-E/P Datasheet - Page 333
![IC MCU FLASH 32KX16 40DIP](/photos/6/61/66192/150-40-dip_sml.jpg)
PIC18F4680-E/P
Manufacturer Part Number
PIC18F4680-E/P
Description
IC MCU FLASH 32KX16 40DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F2221-ISO.pdf
(46 pages)
3.PIC18F4585-IPT.pdf
(482 pages)
4.PIC18F4585-IPT.pdf
(14 pages)
5.PIC18F4585-IPT.pdf
(8 pages)
6.PIC18F4585-IPT.pdf
(12 pages)
7.PIC18F4585-IPT.pdf
(4 pages)
Specifications of PIC18F4680-E/P
Core Size
8-Bit
Program Memory Size
64KB (32K x 16)
Core Processor
PIC
Speed
25MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.25K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
40-DIP (0.600", 15.24mm)
Controller Family/series
PIC18
No. Of I/o's
36
Eeprom Memory Size
1KB
Ram Memory Size
3.25KB
Cpu Speed
40MHz
No. Of Timers
4
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3.25 KB
Interface Type
I2C, SPI, EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
44
Number Of Timers
4 bit
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163011
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 11 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
I3-DB18F4680 - BOARD DAUGHTER ICEPIC3DVA18XP400 - DEVICE ADAPTER 18F4220 PDIP 40LDACICE0206 - ADAPTER MPLABICE 40P 600 MIL
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F4680-E/P
Manufacturer:
Microchip Technology
Quantity:
135
Company:
Part Number:
PIC18F4680-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC18F2221-ISO PDF datasheet #2
- PIC18F4585-IPT PDF datasheet #3
- PIC18F4585-IPT PDF datasheet #4
- PIC18F4585-IPT PDF datasheet #5
- PIC18F4585-IPT PDF datasheet #6
- PIC18F4585-IPT PDF datasheet #7
- Current page: 333 of 482
- Download datasheet (9Mb)
In Mode 1 and 2, there are an additional 10 acceptance
filters, RXF6-RXF15, creating a total of 16 available
filters. RXF15 can be used either as an acceptance
filter or acceptance mask register. Each of these
acceptance filters can be individually enabled or
disabled by setting or clearing the RXFENn bit in the
RXFCONn register. Any of these 16 acceptance filters
can be dynamically associated with any of the receive
buffers. Actual association is made by setting appropri-
ate bits in the RXFBCONn register. Each RXFBCONn
register contains a nibble for each filter. This nibble can
be used to associate a specific filter to any of available
receive buffers. User firmware may associate more
than one filter to any one specific receive buffer.
In addition to dynamic filter to buffer association, in
Mode 1 and 2, each filter can also be dynamically asso-
ciated to available acceptance mask registers. The
FILn_m bits in the MSELn register can be used to link
a specific acceptance filter to an acceptance mask reg-
ister. As with filter to buffer association, one can also
associate more than one mask to a specific acceptance
filter.
When a filter matches and a message is loaded into the
receive buffer, the filter number that enabled the mes-
sage reception is loaded into the FILHIT bit(s). In
Mode 0 for RXB1, the RXB1CON register contains the
FILHIT<2:0> bits. They are coded as follows:
• 101 = Acceptance Filter 5 (RXF5)
• 100 = Acceptance Filter 4 (RXF4)
• 011 = Acceptance Filter 3 (RXF3)
• 010 = Acceptance Filter 2 (RXF2)
• 001 = Acceptance Filter 1 (RXF1)
• 000 = Acceptance Filter 0 (RXF0)
FIGURE 23-3:
© 2007 Microchip Technology Inc.
Note:
RXFn
‘000’ and ‘001’ can only occur if the
RXB0DBEN bit is set in the RXB0CON
register, allowing RXB0 messages to
rollover into RXB1.
0
Acceptance Filter Register
Message Assembly Buffer
RXFn
Identifier
MESSAGE ACCEPTANCE MASK AND FILTER OPERATION
1
RXFn
n
PIC18F2585/2680/4585/4680
RXMn
Preliminary
0
Acceptance Mask Register
RXMn
The coding of the RXB0DBEN bit enables these three
bits to be used similarly to the FILHIT bits and to
distinguish a hit on filter RXF0 and RXF1, in either
RXB0 or after a rollover into RXB1.
• 111 = Acceptance Filter 1 (RXF1)
• 110 = Acceptance Filter 0 (RXF0)
• 001 = Acceptance Filter 1 (RXF1)
• 000 = Acceptance Filter 0 (RXF0)
If the RXB0DBEN bit is clear, there are six codes
corresponding to the six filters. If the RXB0DBEN bit is
set, there are six codes corresponding to the six filters,
plus two additional codes corresponding to RXF0 and
RXF1 filters, that rollover into RXB1.
In Mode 1 and 2, each buffer control register contains
5 bits of filter hit bits (FILHIT<4:0>). A binary value of ‘0’
indicates a hit from RXF0 and 15 indicates RXF15.
If more than one acceptance filter matches, the FILHIT
bits will encode the binary value of the lowest num-
bered filter that matched. In other words, if filter RXF2
and filter RXF4 match, FILHIT will be loaded with the
value for RXF2. This essentially prioritizes the
acceptance filters with a lower number filter having
higher priority. Messages are compared to filters in
ascending order of filter number.
The mask and filter registers can only be modified
when the PIC18F2585/2680/4585/4680 devices are in
Configuration mode.
1
RXMn
n
DS39625C-page 331
RxRqst
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