PIC18LF442-I/L Microchip Technology, PIC18LF442-I/L Datasheet - Page 220
![IC MCU FLASH 8KX16 A/D 44PLCC](/photos/6/63/66325/150-44-plcc_sml.jpg)
PIC18LF442-I/L
Manufacturer Part Number
PIC18LF442-I/L
Description
IC MCU FLASH 8KX16 A/D 44PLCC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16LF627A-IP.pdf
(8 pages)
3.PIC18F242-ISO.pdf
(332 pages)
4.PIC18F242-ISO.pdf
(14 pages)
5.PIC18F242-ISO.pdf
(16 pages)
6.PIC18F242-ISO.pdf
(16 pages)
7.PIC18F242-ISO.pdf
(14 pages)
8.PIC18LF242-ISO.pdf
(36 pages)
Specifications of PIC18LF442-I/L
Core Size
8-Bit
Program Memory Size
16KB (8K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
34
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Controller Family/series
PIC18
No. Of I/o's
34
Eeprom Memory Size
256Byte
Ram Memory Size
768Byte
Cpu Speed
40MHz
No. Of Timers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18LF442-I/L
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC16LF627A-IP PDF datasheet #2
- PIC18F242-ISO PDF datasheet #3
- PIC18F242-ISO PDF datasheet #4
- PIC18F242-ISO PDF datasheet #5
- PIC18F242-ISO PDF datasheet #6
- PIC18F242-ISO PDF datasheet #7
- PIC18LF242-ISO PDF datasheet #8
- Current page: 220 of 332
- Download datasheet (6Mb)
PIC18FXX2
ADDWFC
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
DS39564C-page 218
Q Cycle Activity:
Before Instruction
After Instruction
Decode
Carry bit =
REG
W
Carry bit =
REG
W
Q1
=
=
=
=
register 'f'
ADD W and Carry bit to f
[ label ] ADDWFC
0
d
a
(W) + (f) + (C)
N,OV, C, DC, Z
Add W, the Carry Flag and data
memory location 'f'. If 'd' is 0, the
result is placed in W. If 'd' is 1, the
result is placed in data memory loca-
tion 'f'. If ‘a’ is 0, the Access Bank
will be selected. If ‘a’ is 1, the BSR
will not be overridden.
1
1
ADDWFC
Read
Q2
0010
1
0x02
0x4D
0
0x02
0x50
f
[0,1]
[0,1]
255
00da
REG, 0, 1
Process
Data
Q3
dest
ffff
f [,d [,a]
destination
Write to
Q4
ffff
ANDLW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
Before Instruction
After Instruction
Decode
W
W
Q1
Read literal
=
=
AND literal with W
[ label ] ANDLW
0
(W) .AND. k
N,Z
The contents of W are ANDed with
the 8-bit literal 'k'. The result is
placed in W.
1
1
ANDLW
0000
Q2
'k'
0xA3
0x03
k
© 2006 Microchip Technology Inc.
255
1011
0x5F
Process
Data
Q3
W
k
kkkk
Write to W
Q4
kkkk
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