AT91SAM7S321-AU Atmel, AT91SAM7S321-AU Datasheet - Page 140

• Manufacturer Part Number: AT91SAM7S321-AU
• Description: IC ARM7 MCU FLASH 32K 64LQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7S321-AU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 55MHz
• Connectivity: I²C, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Processor Series: AT91SAMx
• Core: ARM7TDMI
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, I2S, SPI, SSC, TWI, UART, USB
• Maximum Clock Frequency: 55 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 10 bit
• Operating Supply Voltage: 1.8 V to 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, KSK-AT91SAM7S-PL, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM7S-EK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Controller Family/series: AT91SAM7xxxx
• No. Of I/o's: 32
• Ram Memory Size: 8KB
• Cpu Speed: 55MHz
• No. Of Timers: 3
• Rohs Compliant: Yes
• For Use With: AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7S-EK - KIT EVAL FOR ARM AT91SAM7S
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

20.3.4.3
20.3.4.4
20.3.4.5
140
AT91SAM7S Series Preliminary
Flash Full Erase Command
Flash Lock Commands
Flash General-purpose NVM Commands
This command is used to erase the Flash memory planes.
All lock bits must be deactivated before using the Full Erase command. This can be done by
using the CLB command.
Table 20-24. Full Erase Command
Lock bits can be set using WPL or EWPL commands. They can also be set by using the Set
Lock command (SLB). With this command, several lock bits can be activated at the same time.
Bit 0 of Bit Mask corresponds to the first lock bit and so on.
In the same way, the Clear Lock command (CLB) is used to clear lock bits. All the lock bits can
also be cleared by the EA command.
Table 20-25. Set and Clear Lock Bit Command
Lock bits can be read using Get Lock Bit command (GLB). When a bit set in the Bit Mask is
returned, then the corresponding lock bit is active.
Table 20-26. Get Lock Bit Command
General-purpose NVM bits (GP NVM) can be set with the Set GPNVM command (SGPB). Using
this command, several GP NVM bits can be activated at the same time. Bit 0 of Bit Mask corre-
sponds to the first GPNVM bit and so on.
In the same way, the Clear GPNVM command (CGPB) is used to clear GP NVM bits. All the
general-purpose NVM bits are also cleared by the EA command.
Table 20-27. Set and Clear General-purpose NVM Bit Command
Read/Write
Write
Read/Write
Write
Write
Read/Write
Write
Read
Read/Write
Write
Write
DR Data
EA
DR Data
SLB or CLB
DR Data
GLB
Bit Mask
Bit Mask
DR Data
SGPB or CGPB
Bit Mask
6175K–ATARM–30-Aug-10