PIC16F767-I/SS Microchip Technology, PIC16F767-I/SS Datasheet - Page 115
![IC PIC MCU FLASH 8KX14 28SSOP](/photos/6/81/68119/150-28-ssop_sml.jpg)
PIC16F767-I/SS
Manufacturer Part Number
PIC16F767-I/SS
Description
IC PIC MCU FLASH 8KX14 28SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16F737-ISP.pdf
(276 pages)
4.PIC16F737-ISP.pdf
(10 pages)
Specifications of PIC16F767-I/SS
Core Size
8-Bit
Program Memory Size
14KB (8K x 14)
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Number Of I /o
25
Program Memory Type
FLASH
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP
Controller Family/series
PIC16F
No. Of I/o's
25
Ram Memory Size
368Byte
Cpu Speed
20MHz
No. Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
I3DBF777 - BOARD DAUGHTER ICEPIC3AC164307 - MODULE SKT FOR PM3 28SSOPXLT28SS-1 - SOCKET TRANSITION ICE 28SSOP
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F767-I/SS
Manufacturer:
MICROCHI
Quantity:
20 000
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16F737-ISP PDF datasheet #3
- PIC16F737-ISP PDF datasheet #4
- Current page: 115 of 688
- Download datasheet (3Mb)
7.2
1997 Microchip Technology Inc.
Control Register
bit 7:5
bit 4
bit 3
bit 2
bit 1
bit 0
Register 7-1: EECON1 Register
bit 7
Unimplemented: Read as '0'
EEIF: EEPROM Write Operation Interrupt Flag bit
1 = The write operation completed (must be cleared in software)
0 = The write operation is not complete or has not been started
WRERR: EEPROM Error Flag bit
1 = A write operation is prematurely terminated
0 = The write operation completed
WREN: EEPROM Write Enable bit
1 = Allows write cycles
0 = Inhibits write to the data EEPROM
WR: Write Control bit
1 = initiates a write cycle. The bit is cleared by hardware once write is complete.
0 = Write cycle to the data EEPROM is complete
RD: Read Control bit
1 = Initiates an EEPROM read. Read takes one cycle. RD is cleared in hardware.
0 = Does not initiate an EEPROM read
Legend
R = Readable bit
U = Unimplemented bit, read as ‘0’
Note 1: Future devices will have this bit in the PIR register.
U-0
The WR bit can only be set (not cleared) in software.
The RD bit can only be set (not cleared) in software.
(any MCLR reset or any WDT reset during normal operation)
—
U-0
—
W = Writable bit
U-0
Section 7. Data EEPROM
—
EEIF
R/W-1
(1)
S = Settable bit
- n = Value at POR reset
WRERR
R/W-1
WREN
R/W-x
R/S-0
WR
DS31007A-page 7-3
bit 0
R/S-x
RD
7
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