PIC18F4585-E/P Microchip Technology, PIC18F4585-E/P Datasheet - Page 36
PIC18F4585-E/P
Manufacturer Part Number
PIC18F4585-E/P
Description
IC MCU FLASH 24KX16 40DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F2221-ISO.pdf
(46 pages)
3.PIC18F4585-IPT.pdf
(482 pages)
4.PIC18F4585-IPT.pdf
(14 pages)
5.PIC18F4585-IPT.pdf
(8 pages)
6.PIC18F4585-IPT.pdf
(12 pages)
7.PIC18F4585-IPT.pdf
(4 pages)
Specifications of PIC18F4585-E/P
Core Processor
PIC
Core Size
8-Bit
Speed
25MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
48KB (24K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.25K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
40-DIP (0.600", 15.24mm)
For Use With
I3-DB18F4680 - BOARD DAUGHTER ICEPIC3DVA18XP400 - DEVICE ADAPTER 18F4220 PDIP 40LDACICE0206 - ADAPTER MPLABICE 40P 600 MIL
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F4585-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC18F2XXX/4XXX FAMILY
TABLE 5-3:
DS39622L-page 36
EBTR5
EBTR4
EBTR3
EBTR2
EBTR1
EBTR0
EBTRB
DEV<10:3>
DEV<2:0>
REV<4:0>
Note 1:
Bit Name
2:
The BBSIZ bits, BBSIZ<1:0> and BBSIZ<2:1> bits, cannot be changed once any of the following
code-protect bits are enabled: CPB or CP0, WRTB or WRT0, EBTRB or EBTR0.
Not available in PIC18FXX8X and PIC18F2450/4450 devices.
PIC18F2XXX/4XXX FAMILY BIT DESCRIPTIONS (CONTINUED)
Configuration
CONFIG7H
CONFIG7L
CONFIG7L
CONFIG7L
CONFIG7L
CONFIG7L
CONFIG7L
DEVID2
DEVID1
DEVID1
Words
Table Read Protection bit (Block 5 code memory area)
(PIC18F2685 and PIC18F4685 devices only)
1 = Block 5 is not protected from Table Reads executed in other blocks
0 = Block 5 is protected from Table Reads executed in other blocks
Table Read Protection bit (Block 4 code memory area)
(PIC18F2682/2685 and PIC18F4682/4685 devices only)
1 = Block 4 is not protected from Table Reads executed in other blocks
0 = Block 4 is protected from Table Reads executed in other blocks
Table Read Protection bit (Block 3 code memory area)
1 = Block 3 is not protected from Table Reads executed in other blocks
0 = Block 3 is protected from Table Reads executed in other blocks
Table Read Protection bit (Block 2 code memory area)
1 = Block 2 is not protected from Table Reads executed in other blocks
0 = Block 2 is protected from Table Reads executed in other blocks
Table Read Protection bit (Block 1 code memory area)
1 = Block 1 is not protected from Table Reads executed in other blocks
0 = Block 1 is protected from Table Reads executed in other blocks
Table Read Protection bit (Block 0 code memory area)
1 = Block 0 is not protected from Table Reads executed in other blocks
0 = Block 0 is protected from Table Reads executed in other blocks
Table Read Protection bit (Boot Block memory area)
1 = Boot Block is not protected from Table Reads executed in other blocks
0 = Boot Block is protected from Table Reads executed in other blocks
Device ID bits
These bits are used with the DEV<2:0> bits in the DEVID1 register to identify
part number.
Device ID bits
These bits are used with the DEV<10:3> bits in the DEVID2 register to identify
part number.
Revision ID bits
These bits are used to indicate the revision of the device. The REV4 bit is
sometimes used to fully specify the device type.
Description
2010 Microchip Technology Inc.