PIC24HJ64GP510-E/PF Microchip Technology, PIC24HJ64GP510-E/PF Datasheet - Page 203

• Manufacturer Part Number: PIC24HJ64GP510-E/PF
• Description: IC PIC MCU FLASH 32KX16 100TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 24Hr

Specifications of PIC24HJ64GP510-E/PF

• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 64KB (22K x 24)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 32x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 100-TQFP, 100-VQFP
• For Use With: DM300024 - KIT DEMO DSPICDEM 1.1MA240012 - MODULE PLUG-IN PIC24H 100QFPDV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32AC164323 - MODULE SKT FOR 100TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

20.0
The PIC24HJXXXGPX06/X08/X10 devices have up to
32 Analog-to-Digital input channels. These devices
also have up to 2 Analog-to-Digital converter modules
(ADCx, where ‘x’ = 1 or 2), each with its own set of
Special Function Registers.
The AD12B bit (ADxCON1<10>) allows each of the
ADC modules to be configured by the user as either a
10-bit, 4-sample/hold ADC (default configuration) or a
12-bit, 1-sample/hold ADC.
20.1
The 10-bit ADC configuration has the following key
features:
• Successive Approximation (SAR) conversion
• Conversion speeds of up to 1.1 Msps
• Up to 32 analog input pins
• External voltage reference input pins
• Simultaneous sampling of up to four analog input
• Automatic Channel Scan mode
• Selectable conversion trigger source
• Selectable Buffer Fill modes
• Two result alignment options (signed/unsigned)
• Operation during CPU Sleep and Idle modes
The 12-bit ADC configuration supports all the above
features, except:
• In the 12-bit configuration, conversion speeds of
• There is only 1 sample/hold amplifier in the 12-bit
Depending on the particular device pinout, the Ana-
log-to-Digital Converter can have up to 32 analog input
pins, designated AN0 through AN31. In addition, there
are two analog input pins for external voltage reference
connections. These voltage reference inputs may be
shared with other analog input pins. The actual number
© 2009 Microchip Technology Inc.
Note:
Note:
pins
up to 500 ksps are supported
configuration, so simultaneous sampling of
multiple channels is not supported.
10-BIT/12-BIT
ANALOG-TO-DIGITAL
CONVERTER (ADC)
Key Features
This data sheet summarizes the features
of the PIC24HJXXXGPX06/X08/X10 fam-
ily of devices. However, it is not intended
to be a comprehensive reference source.
To complement the information in this data
sheet, refer to the “PIC24H Family Refer-
ence
log-to-Digital
(DS70225), which is available from the
Microchip website (www.microchip.com).
The ADC module needs to be disabled
before modifying the AD12B bit.
Manual”,
Converter
Section
16.
PIC24HJXXXGPX06/X08/X10
(ADC)”
“Ana-
of analog input pins and external voltage reference
input configuration will depend on the specific device.
Refer to the device data sheet for further details.
A block diagram of the Analog-to-Digital Converter is
shown in Figure 20-1.
20.2
The following configuration steps should be performed.
1.
2.
20.3
If more than one conversion result needs to be buffered
before triggering an interrupt, DMA data transfers can
be used. Both ADC1 and ADC2 can trigger a DMA data
transfer. If ADC1 or ADC2 is selected as the DMA IRQ
source, a DMA transfer occurs when the AD1IF or
AD2IF bit gets set as a result of an ADC1 or ADC2
sample conversion sequence.
The SMPI<3:0> bits (ADxCON2<5:2>) are used to
select how often the DMA RAM buffer pointer is
incremented.
The ADDMABM bit (ADxCON1<12>) determines how
the conversion results are filled in the DMA RAM buffer
area being used for ADC. If this bit is set, DMA buffers
are written in the order of conversion. The module will
provide an address to the DMA channel that is the
same as the address used for the non-DMA
stand-alone buffer. If the ADDMABM bit is cleared, then
DMA buffers are written in Scatter/Gather mode. The
module will provide a scatter/gather address to the
DMA channel, based on the index of the analog input
and the size of the DMA buffer.
Configure the ADC module:
a)
b)
c)
d)
e)
f)
g)
Configure ADC interrupt (if required):
a)
b)
Analog-to-Digital Initialization
Select
(ADxPCFGH<15:0> or ADxPCFGL<15:0>)
Select voltage reference source to match
expected
(ADxCON2<15:13>)
Select the analog conversion clock to
match desired data rate with processor
clock (ADxCON3<7:0>)
Determine how many S/H channels will
be
ADxPCFGH<15:0> or ADxPCFGL<15:0>)
Select the appropriate sample/conversion
sequence
ADxCON3<12:8>)
Select
presented in the buffer (ADxCON1<9:8>)
Turn on the ADC module (ADxCON1<15>)
Clear the ADxIF bit
Select ADC interrupt priority
ADC and DMA
used
port
how
range
pins
(ADxCON1<7:5>
conversion
(ADxCON2<9:8>
on
as
DS70175H-page 201
analog
analog
results
inputs
inputs
and
and
are