PIC16F877AT-E/ML Microchip Technology, PIC16F877AT-E/ML Datasheet - Page 231
![IC MCU FLASH 8KX14 A/D 44QFN](/photos/6/81/68122/150-44-qfn_sml.jpg)
PIC16F877AT-E/ML
Manufacturer Part Number
PIC16F877AT-E/ML
Description
IC MCU FLASH 8KX14 A/D 44QFN
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16C770-ISO.pdf
(8 pages)
4.PIC16F873A-ISO.pdf
(234 pages)
5.PIC16F873A-ISO.pdf
(6 pages)
6.PIC16F873A-ISO.pdf
(4 pages)
7.PIC16F873A-ISO.pdf
(6 pages)
8.PIC16F873A-ISO.pdf
(4 pages)
9.PIC16F873A-ISO.pdf
(22 pages)
Specifications of PIC16F877AT-E/ML
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
44-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16C770-ISO PDF datasheet #3
- PIC16F873A-ISO PDF datasheet #4
- PIC16F873A-ISO PDF datasheet #5
- PIC16F873A-ISO PDF datasheet #6
- PIC16F873A-ISO PDF datasheet #7
- PIC16F873A-ISO PDF datasheet #8
- PIC16F873A-ISO PDF datasheet #9
- Current page: 231 of 688
- Download datasheet (3Mb)
15.3.5
SS
SCK (CKP = 0,
SCK (CKP = 1,
Write to
SSPBUF
SDO
SDI
(SMP = 0)
Input
Sample (SMP = 0)
optional
SSPIF
SSPSR to
SSPBUF
1997 Microchip Technology Inc.
CKE = 0)
CKE = 0)
Slave Operation
In slave mode, the data is transmitted and received as the external clock pulses appear on SCK.
When the last bit is latched, the interrupt flag bit SSPIF is set.
The clock polarity is selected by appropriately programming bit CKP (SSPCON<4>). This then
would give waveforms for SPI communication as shown in
Figure 15-5
the minimum high and low times.
In sleep mode, the slave can transmit and receive data. When a byte is received, the device will
wake-up from sleep, if the interrupt is enabled.
Figure 15-4:
bit7
bit7
where the MSb is transmitted first. When in slave mode the external clock must meet
SPI Mode Waveform (Slave Mode With CKE = 0)
bit6
bit5
bit4
bit3
Section 15. SSP
bit2
Figure
bit1
15-3,
bit0
DS31015A-page 15-11
bit0
Figure
Next Q4 Cycle
after Q2
15-4, and
15
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