PIC16LF76-I/SP Microchip Technology, PIC16LF76-I/SP Datasheet - Page 46

• Manufacturer Part Number: PIC16LF76-I/SP
• Description: IC PIC MCU FLASH 8KX14 28DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16LF76-I/SP

• Core Size: 8-Bit
• Program Memory Size: 14KB (8K x 14)
• Oscillator Type: External
• Core Processor: PIC
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Type: FLASH
• Ram Size: 368 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 5x8b
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-DIP (0.300", 7.62mm)
• Controller Family/series: PIC16LF
• No. Of I/o's: 22
• Ram Memory Size: 368Byte
• Cpu Speed: 20MHz
• No. Of Timers: 3
• No. Of Pwm: RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PIC16LF76I/SP

PIC16F7X
5.2
When no prescaler is used, the external clock input is
the same as the prescaler output. The synchronization
of T0CKI, with the internal phase clocks, is accom-
plished by sampling the prescaler output on the Q2 and
REGISTER 5-1:
DS30325B-page 44
Using Timer0 with an External
Clock
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2-0
OPTION_REG REGISTER
Bit Value
bit 7
RBPU: PORTB Pull-up Enable bit (see Section 2.2.2.2)
INTEDG: Interrupt Edge Select bit (see Section 2.2.2.2)
T0CS: TMR0 Clock Source Select bit
1 = Transition on T0CKI pin
0 = Internal instruction cycle clock (CLKOUT)
T0SE: TMR0 Source Edge Select bit
1 = Increment on high-to-low transition on T0CKI pin
0 = Increment on low-to-high transition on T0CKI pin
PSA: Prescaler Assignment bit
1 = Prescaler is assigned to the WDT
0 = Prescaler is assigned to the Timer0 module
PS2:PS0: Prescaler Rate Select bits
Legend:
R = Readable bit
- n = Value at POR reset
Note:
R/W-1
RBPU
000
001
010
011
100
101
110
111
To avoid an unintended device RESET, the instruction sequences shown in
Example 5-1 and Example 5-2 (page 45) must be executed when changing the pres-
caler assignment between Timer0 and the WDT. This sequence must be followed
even if the WDT is disabled.
TMR0 Rate
INTEDG
R/W-1
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 128
1 : 256
WDT Rate
R/W-1
T0CS
1 : 1
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 128
W = Writable bit
’1’ = Bit is set
R/W-1
T0SE
Q4 cycles of the internal phase clocks. Therefore, it is
necessary for T0CKI to be high for at least 2Tosc (and
a small RC delay of 20 ns) and low for at least 2Tosc
(and a small RC delay of 20 ns). Refer to the electrical
specification of the desired device.
R/W-1
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
PSA
R/W-1
PS2
 2002 Microchip Technology Inc.
x = Bit is unknown
R/W-1
PS1
R/W-1
PS0
bit 0