AT89C51RB2-3CSUL Atmel, AT89C51RB2-3CSUL Datasheet - Page 90
![MCU 8051 16K FLASH 3V 44-PLCC](/photos/6/70/67043/453-44-plcc_sml.jpg)
AT89C51RB2-3CSUL
Manufacturer Part Number
AT89C51RB2-3CSUL
Description
MCU 8051 16K FLASH 3V 44-PLCC
Manufacturer
Atmel
Series
89Cr
Datasheet
1.AT89C51RB2-RLTIL.pdf
(127 pages)
Specifications of AT89C51RB2-3CSUL
Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
32
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Processor Series
AT89x
Core
8051
Data Bus Width
8 bit
Data Ram Size
1280 B
Interface Type
UART, SPI
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Mounting Style
Through Hole
3rd Party Development Tools
PK51, CA51, A51, ULINK2
For Use With
AT89STK-11 - KIT STARTER FOR AT89C51RX2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Flash Memory Status
Figure 35. Flash Memory Possible Contents
Memory Organization
90
AT89C51RB2/RC2
0000h
7FFFh T89C51RC2 32KB
3FFFh
Default
Virgin
T89C51RB2 16KB
Table 69. Program Lock Bits of the SSB
Note:
AT89C51RB2/RC2 parts are delivered in standard with the ISP boot in the Flash mem-
ory. After ISP or parallel programming, the possible contents of the Flash memory are
summarized on Figure 35.
In the AT89C51RB2/RC2, the lowest 16K or 32K of the 64 KB program memory address
space is filled by internal Flash.
When the EA pin is high, the processor fetches instructions from internal program Flash.
Bus expansion for accessing program memory from 16K or 32K upward automatic since
external instruction fetches occur automatically when the program counter exceeds
3FFFh (16K) or 7FFFh (32K). If the EA pin is tied low, all program memory fetches are
from external memory.
After ISP
Application
Security
level
Program Lock Bits
1
2
3
U: unprogrammed or "one" level.
P: programmed or "zero" level.
X: don’t care
WARNING: Security level 2 and 3 should only be programmed after Flash and code
verification.
LB0
U
P
X
Dedicated
ISP
After ISP
Application
LB1
U
U
P
Virgin
or
Protection Description
No program lock features enabled.
ISP programming of the Flash is disabled.
Same as 2, also verify through ISP programming interface is disabled.
After Parallel
Programming
Application
After Parallel
Programming
Dedicated
ISP
Application
Virgin
or
4180E–8051–10/06