PIC18F87K90-I/PTRSL Microchip Technology, PIC18F87K90-I/PTRSL Datasheet - Page 3
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PIC18F87K90-I/PTRSL
Manufacturer Part Number
PIC18F87K90-I/PTRSL
Description
MCU PIC 128K FLASH XLP 80TQFP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Specifications of PIC18F87K90-I/PTRSL
Core Size
8-Bit
Program Memory Size
128KB (64K x 16)
Core Processor
PIC
Speed
64MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
69
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 24x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TFQFP
Controller Family/series
PIC18
Eeprom Memory Size
1024Byte
Ram Memory Size
4096Byte
Cpu Speed
16MIPS
No. Of Timers
11
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
I2C, SPI
Maximum Clock Frequency
64 MHz
Number Of Timers
11
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 24 Channel
A/d Bit Size
12 bit
A/d Channels Available
24
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F87K90-I/PTRSL
Manufacturer:
Maxim
Quantity:
89
Company:
Part Number:
PIC18F87K90-I/PTRSL
Manufacturer:
Microchip Technology
Quantity:
10 000
Silicon Errata Issues
1. Module: Analog-to-Digital Converter
2. Module: Ports
2010 Microchip Technology Inc.
Note:
The ADC will not meet the Microchip standard
ADC specification. ADC may be usable if tested
at the user end. The possible issues are high off-
set error, high DNL error and multiple missing
codes. The ADC can be tested and used for
relative measurements.
The ADC issues will be fixed in a future revision
of this part.
ADC Offset
The ADC may have high offset error up to a
maximum of 50 LSB; it can be used if the ADC
is calibrated for the offset.
Work around
Method to Calibrate for Offset:
In Single-Ended mode, connect ADC +ve input
to ground and take the ADC reading. This will be
the offset of the device and can be used to com-
pensate for the subsequent ADC readings on
the actual inputs.
Affected Silicon Revisions
The input leakage will not match the D060
specification in the data sheet. The leakage will
meet the 200 nA specification at T
T
2 A.
Work around
None.
Affected Silicon Revisions
A
A3
A3
X
X
= 85°C, the leakage will be up to a max of
This document summarizes all silicon
errata issues from all revisions of silicon,
previous as well as current. Only the
issues indicated by the shaded column in
the following tables apply to the current
silicon revision (A3).
(A/D)
A
= 25°C. At
PIC18F87K90 FAMILY
3. Module: High/Low Voltage Detect (HLVD)
4. Module: ECCP
5. Module: EUSART
The high-to-low (VDIRMAG = 0) setting of the
HLVD may send initial interrupts. High trip points
that are close to the intended operating voltage
are susceptible to this behavior.
Work around
Select a lower trip voltage that allows consistent
start-up, or clear any initial interrupts from the
HLVD on start-up.
Affected Silicon Revisions
The tri-state setting of the auto-shutdown feature
in the enhanced PWM may not successfully drive
the pin to tri-state. The pin will remain an output
and should not be driven externally. All tri-state
settings will be affected.
Work around
None.
Affected Silicon Revisions
When using the Synchronous Transmit mode of
the EUSART, at high baud rates, transmitted data
may become corrupted. One or more bits of the
intended transmit message may be incorrect.
Work around
Since this problem is related to the baud rate
used, a fixed delay added before loading the
TXREGx may not be a reliable work around.
Lower the baud rate until no errors occur, or
when loading the TXREGx, check that the
TRMT bit inside of the TXSTAx register is set
instead of checking the TXxIF bit.The following
code can be used:
while(!TXSTAxbits.TRMT);
// wait to load TXREGx until TRMT is set
Affected Silicon Revisions
A3
A3
A3
X
X
X
DS80500B-page 3