PIC18LF4420-I/PT Microchip Technology, PIC18LF4420-I/PT Datasheet - Page 4

IC MCU FLASH 8KX16 44TQFP

PIC18LF4420-I/PT

Manufacturer Part Number
PIC18LF4420-I/PT
Description
IC MCU FLASH 8KX16 44TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18LF4420-I/PT

Core Size
8-Bit
Program Memory Size
16KB (8K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Controller Family/series
PIC18
No. Of I/o's
36
Eeprom Memory Size
256Byte
Ram Memory Size
768Byte
Cpu Speed
40MHz
No. Of Timers
4
Package
44TQFP
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Operating Supply Voltage
2.5|3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
36
Interface Type
I2C/SPI/USART
On-chip Adc
13-chx10-bit
Number Of Timers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18LF4420-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC18F2420/2520/4420/4520
6. Module: Master Synchronous Serial Port
DS80304D-page 4
When configured for I
MSSP module may not receive the correct data, in
extremely rare cases. This occurs only if the Serial
Receive/Transmit Buffer Register (SSPBUF) is not
read after the SSPIF interrupt (PIR1<3>) has
occurred, but before the first rising clock edge of
the next byte being received.
Work around
The issue can be resolved in either of these ways:
• Prior to the I
• Each time the SSPIF is set, read the SSPBUF
Date Codes that pertain to this issue:
All engineering and production devices.
clock stretching feature.
This
(SSPCON2<0>).
before the first rising clock edge of the next byte
being received.
is
(MSSP)
done
2
C slave reception, enable the
by
2
C™ slave reception, the
setting
the
SEN
bit
REVISION HISTORY
Rev A Document (2/2007)
First revision of this document. Silicon issue 1 (MSSP)
and 2 (MSSP [SPI Master] ).
Rev B Document (4/2007)
Added
Synchronous Receiver Transmitter – EUSART).
Rev C Document (6/2007)
Added silicon issue 4 (10-Bit Analog-to-Digital
Converter).
Rev D Document (8/2009)
Added silicon issues 5 (EUSART) and 6 (MSSP).
silicon
issue
 2009 Microchip Technology Inc.
3
(Enhanced
Universal

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