PIC24HJ64GP510-E/PT Microchip Technology, PIC24HJ64GP510-E/PT Datasheet - Page 114

• Manufacturer Part Number: PIC24HJ64GP510-E/PT
• Description: IC PIC MCU FLASH 32KX16 100TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 24Hr

Specifications of PIC24HJ64GP510-E/PT

• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 64KB (22K x 24)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 32x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 100-TFQFP
• For Use With: AC164333 - MODULE SKT FOR PM3 100QFPDM300024 - KIT DEMO DSPICDEM 1.1MA240012 - MODULE PLUG-IN PIC24H 100QFPDV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

PIC24HJXXXGPX06/X08/X10
FIGURE 8-1:
8.1
Each DMAC Channel x (x = 0, 1, 2, 3, 4, 5, 6 or 7)
contains the following registers:
• A 16-bit DMA Channel Control register
• A 16-bit DMA Channel IRQ Select register
• A 16-bit DMA RAM Primary Start Address Offset
• A 16-bit DMA RAM Secondary Start Address
• A 16-bit DMA Peripheral Address register
• A 10-bit DMA Transfer Count register (DMAxCNT)
An additional pair of status registers, DMACS0 and
DMACS1 are common to all DMAC channels.
DS70175H-page 112
(DMAxCON)
(DMAxREQ)
register (DMAxSTA)
Offset register (DMAxSTB)
(DMAxPAD)
Note: CPU and DMA address buses are not shown for clarity.
SRAM
DMAC Registers
SRAM X-Bus
CPU
TOP LEVEL SYSTEM ARCHITECTURE USING A DEDICATED TRANSACTION BUS
PORT 1
DMA RAM
CPU Peripheral DS Bus
Peripheral
Non-DMA
Ready
PORT 2
DMA DS Bus
DMA Controller
Channels
DMA
Peripheral Indirect Address
CPU
Peripheral 1
Ready
DMA
© 2009 Microchip Technology Inc.
DMA
Peripheral 3
CPU
Ready
DMA
DMA
Peripheral 2
CPU
Ready
DMA
DMA