AT32UC3B1128-AUT Atmel, AT32UC3B1128-AUT Datasheet - Page 61
AT32UC3B1128-AUT
Manufacturer Part Number
AT32UC3B1128-AUT
Description
IC MCU AVR32 128KB FLASH 48-TQFP
Manufacturer
Atmel
Series
AVR®32 UC3r
Specifications of AT32UC3B1128-AUT
Core Processor
AVR
Core Size
32-Bit
Speed
60MHz
Connectivity
I²C, IrDA, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
28
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-TQFP, 48-VQFP
Package
48TQFP
Device Core
AVR32
Family Name
AT32
Maximum Speed
60 MHz
Operating Supply Voltage
1.8|3.3 V
Data Bus Width
32 Bit
Number Of Programmable I/os
28
Interface Type
I2S/SPI/TWI/USART/USB
On-chip Adc
6-chx10-bit
Number Of Timers
3
For Use With
ATSTK600-TQFP48 - STK600 SOCKET/ADAPTER 48-TQFPATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMR770-1008 - ISP 4PORT ATMEL AVR32 MCU SPIATEVK1101 - KIT DEV/EVAL FOR AVR32 AT32UC3B
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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9.6.10
Name:
Access Type:
Offset:
Reset Value:
• BODDET: Brown out detection
• OSC32RDY: 32 KHz oscillator Ready
• OSC1RDY: Oscillator 1 Ready
• OSC0RDY: Oscillator 0 Ready
• MSKRDY: Mask Ready
• CKRDY: Clock Ready
• LOCK1: PLL1 locked
• LOCK0: PLL0 locked
32059K–03/2011
OSC0RDY
31
23
15
7
-
-
-
Set to 1 when 0 to 1 transition on POSCSR:BODDET bit is detected:
BOD reference value.
Set to 1 when 0 to 1 transition on the POSCSR:OSC32RDY bit is detected:
used as clock source.
Set to 1 when 0 to 1 transition on the POSCSR:OSC1RDY bit is detected:
clock source.
Set to 1 when 0 to 1 transition on the POSCSR:OSC1RDY bit is detected:
clock source.
Set to 1 when 0 to 1 transition on the POSCSR:MSKRDY bit is detected:
(CPU/HSB/PBA/PBB)_MASK registers.
0: The CKSEL register has been written, and the new clock setting is not yet effective.
1: The synchronous clocks have frequencies as indicated in the CKSEL register.
Note: Writing ICR:CKRDY to 1 has no effect.
Set to 1 when 0 to 1 transition on the POSCSR:LOCK1 bit is detected:
source.
Set to 1 when 0 to 1 transition on the POSCSR:LOCK0 bit is detected:
source.
•
•
Interrupt Status Register
MSKRDY
30
22
14
6
-
-
-
ISR
Read-only
0x04C
0x00000000
CKRDY
29
21
13
5
-
-
-
28
20
12
4
-
-
-
-
27
19
11
3
-
-
-
-
BOD has detected that power supply is going below
PLL 1 is locked and ready to be selected as clock
PLL 0 is locked and ready to be selected as clock
Clocks are now masked according to the
Oscillator 1 is stable and ready to be used as
Oscillator 1 is stable and ready to be used as
The 32 KHz oscillator is stable and ready to be
26
18
10
2
-
-
-
-
OSC32RDY
LOCK1
25
17
9
1
-
-
AT32UC3B
OSC1RDY
BODDET
LOCK0
24
16
8
0
-
61
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