ATXMEGA32D4-MH Atmel, ATXMEGA32D4-MH Datasheet - Page 26
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ATXMEGA32D4-MH
Manufacturer Part Number
ATXMEGA32D4-MH
Description
IC MCU AVR 32KB FLASH 100VFBGA
Manufacturer
Atmel
Series
AVR® XMEGAr
Datasheet
1.ATXMEGA16D4-AU.pdf
(105 pages)
Specifications of ATXMEGA32D4-MH
Core Processor
AVR
Core Size
8/16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.6 V ~ 3.6 V
Data Converters
A/D 12x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-VQFN Exposed Pad
Processor Series
XMEGA
Core
AVR
Data Bus Width
8 bit, 16 bit
Data Ram Size
4 KB
Interface Type
SPI, USART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
34
Number Of Timers
4
Operating Supply Voltage
2.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 85 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATXMEGA32D4-MH
Manufacturer:
Atmel
Quantity:
1 910
Company:
Part Number:
ATXMEGA32D4-MH
Manufacturer:
Atmel
Quantity:
1 704
Part Number:
ATXMEGA32D4-MH
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
14. I/O Ports
14.1
14.2
14.3
8135J–AVR–12/10
Features
Overview
I/O configuration
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The XMEGA D4 devices have flexible General Purpose I/O Ports. A port consists of up to 8 pins,
ranging from pin 0 to pin 7. The ports implement several functions, including synchronous/asyn-
chronous input sensing, pin change interrupts and configurable output settings. All functions are
individual per pin, but several pins may be configured in a single operation.
All port pins (Pn) have programmable output configuration. In addition, all port pins have an
inverted I/O function. For an input, this means inverting the signal between the port pin and the
pin register. For an output, this means inverting the output signal between the port register and
the port pin. The inverted I/O function can be used also when the pin is used for alternate
functions.
Selectable input and output configuration for each pin individually
Flexible pin configuration through dedicated Pin Configuration Register
Synchronous and/or asynchronous input sensing with port interrupts and events
Asynchronous wake-up from all input sensing configurations
Highly configurable output driver and pull settings:
Flexible pin masking
Configuration of multiple pins in a single operation
Read-Modify-Write (RMW) support
Toggle/clear/set registers for Output and Direction registers
Clock output on port pin
Event Channel 0 output on port pin 7
Mapping of port registers (virtual ports) into bit accessible I/O memory space
– Sense both edges
– Sense rising edges
– Sense falling edges
– Sense low level
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–
–
–
–
–
Totem-pole
Pull-up/-down
Wired-AND
Wired-OR
Bus keeper
Inverted I/O
XMEGA D4
26