ATMEGA324A-MU Atmel, ATMEGA324A-MU Datasheet - Page 82

• Manufacturer Part Number: ATMEGA324A-MU
• Description: IC MCU AVR 32K 20MHZ 44VQFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA324A-MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-VQFN Exposed Pad
• Processor Series: ATmega
• Core: AVR
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: JTAG, TWI, SPI, USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Operating Temperature Range: - 40 C to + 85 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

8272A–AVR–01/10
Table 13-4 on page 82
overriding signals shown in
Table 13-4.
Table 13-5.
164A/164PA/324A/324PA/644A/644PA/1284/1284P
Signal
Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
DIEOE
DIEOV
DI
AIO
Signal
Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
DIEOE
DIEOV
DI
AIO
PA7/ADC7/
PCINT7
0
0
0
0
0
0
PCINT7 • PCIE0 +
ADC7D
PCINT7 • PCIE0
PCINT7 INPUT
ADC7 INPUT
PA3/ADC3/
PCINT3
0
0
0
0
0
0
PCINT3 • PCIE0 +
ADC3D
PCINT3 • PCIE0
PCINT3 INPUT
ADC3 INPUT
Overriding Signals for Alternate Functions in PA7:PA4
Overriding Signals for Alternate Functions in PA3:PA0
and
Table 13-5 on page 82
Figure 13-5 on page
PCINT6 • PCIE0
ADC6 INPUT
PA6/ADC6/
PCINT6
0
0
0
0
0
0
PCINT6 • PCIE0 +
ADC6D
PCINT6 INPUT
PA2/ADC2/
PCINT2
0
0
0
0
0
0
PCINT2 • PCIE0 +
ADC2D
PCINT2 • PCIE0
PCINT2 INPUT
ADC2 INPUT
79.
relates the alternate functions of Port A to the
PA5/ADC5/
PCINT5
0
0
0
0
0
0
PCINT5 • PCIE0 +
ADC5D
PCINT5 • PCIE0
PCINT5 INPUT
ADC5 INPUT
PA1/ADC1/
PCINT1
0
0
0
0
0
0
PCINT1 • PCIE0 +
ADC1D
PCINT1 • PCIE0
PCINT1 INPUT
ADC1 INPUT
PCINT4 • PCIE0
PCINT4 INPUT
PA4/ADC4/
PCINT4
0
0
0
0
0
0
PCINT4 • PCIE0 +
ADC4D
ADC4 INPUT
PA0/ADC0/
PCINT0
0
0
0
0
0
0
PCINT0 • PCIE0 +
ADC0D
PCINT0 • PCIE0
PCINT0 INPUT
ADC0 INPUT
82