PIC16C924-04I/L Microchip Technology, PIC16C924-04I/L Datasheet
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PIC16C924-04I/L
Specifications of PIC16C924-04I/L
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PIC16C924-04I/L Summary of contents
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... Synchronous Serial Port (SSP) with SPI 2 and I C • 8-bit multi-channel Analog to Digital converter (PIC16C924 only) Special Microcontroller Features: • Power-on Reset (POR) • Power-up Timer (PWRT) and Oscillator Start-up Timer (OST) • Watchdog Timer (WDT) with its own on-chip RC oscillator for reliable operation • ...
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... RG2/SEG22 55 54 RG1/SEG21 RG0/SEG20 53 52 RG7/SEG28 RF7/SEG19 51 RF6/SEG18 50 49 RF5/SEG17 RF4/SEG16 48 RF3/SEG15 47 RF2/SEG14 46 RF1/SEG13 45 44 RF0/SEG12 TQFP 48 RD5/SEG29/COM3 RG6/SEG26 47 46 RG5/SEG25 45 RG4/SEG24 RG3/SEG23 44 43 RG2/SEG22 42 RG1/SEG21 RG0/SEG20 41 40 RF7/SEG19 39 RF6/SEG18 RF5/SEG17 38 37 RF4/SEG16 36 RF3/SEG15 35 RF2/SEG14 34 RF1/SEG13 33 RF0/SEG12 1997 Microchip Technology Inc. ...
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... RG2/SEG22 RG1/SEG21 RG0/SEG20 RF7/SEG19 RF6/SEG18 RF5/SEG17 RF4/SEG16 RF3/SEG15 RF2/SEG14 RF1/SEG13 RF0/SEG12 RE6/SEG11 RE5/SEG10 RE4/SEG09 RE3/SEG08 RE2/SEG07 RE1/SEG06 RE0/SEG05 RD4/SEG04 TQFP 1 RA4/T0CKI 2 RA5/AN4/SS 3 RB1 4 RB0/INT 5 RC3/SCK/SCL 6 RC4/SDI/SDA 7 RC5/SDO 8 C1 PIC16C924 LCD LCD OSC1/CLKIN 15 OSC2/CLKOUT 16 RC0/T1OSO/T1CKI PIC16C9XX 60 RD5/SEG29/COM3 59 RG6/SEG26 58 RG5/SEG25 57 RG4/SEG24 56 RG3/SEG23 55 RG2/SEG22 ...
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... However, we realize that we may have missed a few things. If you find any information that is missing or appears in error, please use the reader response form in the back of this data sheet to inform us. We appreciate your assistance in making this a better document. DS30444E - page 4 1997 Microchip Technology Inc. ...
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... It is capable of driving segments and commons. It can also drive the LCD panel while in SLEEP mode. The PIC16C924 devices have 176 bytes of RAM and 25 I/O pins. In addition several peripheral features are available including: three timer/counters, one Cap- ture/Compare/PWM module, one serial port and one LCD module. The Synchronous Serial Port can be con- fi ...
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... Brown-out Reset Packages All PICmicro Family devices have Power-on Reset, selectable Watchdog Timer, selectable code protect and high I/O current capabil- ity. All PIC16C9XX Family devices use serial programming with clock pin RB6 and data pin RB7. DS30444E - page 6 PIC16C923 PIC16C924 176 ...
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... EPROM locations and configuration options already programmed by the factory. Certain code and prototype verification procedures apply before produc- tion shipments are available. Please contact your local Microchip Technology sales office for more details. 2.4 Serialized Quick-Turnaround Production (SQTP ...
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... PIC16C9XX NOTES: DS30444E - page 8 1997 Microchip Technology Inc. ...
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... Consequently, all instruc- tions execute in a single cycle (500 MHz) except for program branches. The PIC16C923 and PIC16C924 both address program memory and 176 data memory. The PIC16CXXX can directly or indirectly address its register files or data memory. All special function regis- ters, including the program counter, are mapped in the data memory ...
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... CCP1 LCD PORTA RA0 RA1 RA2 RA3 RA4/T0CKI RA5/SS PORTB RB0/INT RB1-RB7 PORTC RC0/T1OSO/T1CKI RC1/T1OSI RC2/CCP1 RC3/SCK/SCL RC4/SDI/SDA RC5/SDO PORTD RD0-RD4/SEGnn RD5-RD7/SEGnn/COMn PORTE RE0-RE7/SEGnn PORTF RF0-RF7/SEGnn PORTG RG0-RG7/SEGnn COM0 V 1 LCD V 2 LCD V 3 LCD C1 C2 VLCDADJ 1997 Microchip Technology Inc. ...
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... FIGURE 3-2: PIC16C924 BLOCK DIAGRAM 13 Program Counter EPROM Program Memory 8 Level Stack Program 14 Bus Instruction reg Direct Addr 8 Power-up Instruction Oscillator Start-up Timer Decode & Control Power-on Timing Watchdog Generation OSC1/CLKIN OSC2/CLKOUT MCLR Timer0 A/D Synchronous Serial Port 1997 Microchip Technology Inc. ...
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... I/P ST Master clear (reset) input or programming voltage input. This pin is an active low reset to the device. PORTA is a bi-directional I/O port. The AN and V plexed functions are used by the PIC16C924 only. 60 I/O TTL RA0 can also be Analog input0. 61 I/O TTL RA1 can also be Analog input1 ...
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... Segment Driver25. 46 I/L ST Segment Driver26. 47 I/L ST Segment Driver28 (Not available on 64-pin devices). — I LCD Voltage Generation. — P Analog Power (PIC16C924 only). — P Power (PIC16C923 only LCD Voltage — LCD Voltage power L = LCD Driver TTL = TTL input ST = Schmitt Trigger input PIC16C9XX DS30444E - page 13 ...
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... Description Pin# Type Type 11 P — LCD Voltage. P — Digital power. P — Ground reference. — — — These pins are not internally connected. These pins should be left unconnected power L = LCD Driver TTL = TTL input ST = Schmitt Trigger input 1997 Microchip Technology Inc. ...
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... Instruction @ address SUB_1 All instructions are single cycle, except for any program branches. These take two cycles since the fetch instruction is “flushed” from the pipeline while the new instruction is being fetched and then executed. 1997 Microchip Technology Inc. 3.2 Instruction Flow/Pipelining An “ ...
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... PIC16C9XX NOTES: DS30444E - page 16 1997 Microchip Technology Inc. ...
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... Interrupt Vector On-chip Program Memory (Page 0) On-chip Program Memory (Page 1) 1997 Microchip Technology Inc. 4.2 Data Memory Organization The data memory is partitioned into four Banks which contain the General Purpose Registers and the Special Function Registers. Bits RP1 and RP0 are the bank select bits. RP1:RP0 (STATUS< ...
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... Mapped in 170 Bank 0 70h-7Fh 17F 1FFh Bank 3 1997 Microchip Technology Inc. ...
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... PIC16C923 reset values for PORTA: --xx xxxx for a POR, and --uu uuuu for all other resets, PIC16C924 reset values for PORTA: --0x 0000 when read. 5: Bit1 of ADCON0 is reserved on the PIC16C924, always maintain this bit clear. 1997 Microchip Technology Inc. The special function registers can be classified into two sets (core and peripheral). Those registers associated with the “ ...
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... These pixels do not display, but can be used as general purpose RAM. 4: PIC16C923 reset values for PORTA: --xx xxxx for a POR, and --uu uuuu for all other resets, PIC16C924 reset values for PORTA: --0x 0000 when read. 5: Bit1 of ADCON0 is reserved on the PIC16C924, always maintain this bit clear. DS30444E - page 20 Bit 5 ...
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... These pixels do not display, but can be used as general purpose RAM. 4: PIC16C923 reset values for PORTA: --xx xxxx for a POR, and --uu uuuu for all other resets, PIC16C924 reset values for PORTA: --0x 0000 when read. 5: Bit1 of ADCON0 is reserved on the PIC16C924, always maintain this bit clear. 1997 Microchip Technology Inc. Bit 5 ...
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... These pixels do not display, but can be used as general purpose RAM. 4: PIC16C923 reset values for PORTA: --xx xxxx for a POR, and --uu uuuu for all other resets, PIC16C924 reset values for PORTA: --0x 0000 when read. 5: Bit1 of ADCON0 is reserved on the PIC16C924, always maintain this bit clear. DS30444E - page 22 Bit 5 ...
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... Note: A subtraction is executed by adding the two’s complement of the second operand. For rotate (RRF, RLF) instructions, this bit is loaded with either the high or low order bit of the source register. 1997 Microchip Technology Inc recommended, therefore, that only BCF, BSF, SWAPF and MOVWF instructions are used to alter the STATUS register because these instructions do not affect the bits from the STATUS register ...
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... Note: To achieve a 1:1 prescaler assignment for the TMR0 register, assign the prescaler to the Watchdog Timer. R/W-1 R/W-1 R/W-1 R/W-1 PSA PS2 PS1 PS0 128 R = Readable bit W = Writable bit bit0 U = Unimplemented bit, read as ‘0’ Value at POR reset 1997 Microchip Technology Inc. ...
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... Interrupt flag bits get set when an interrupt condition occurs regardless of the state of its corresponding enable bit or the global enable bit, GIE (INTCON<7>). User software should ensure the appropriate interrupt flag bits are clear prior to enabling an interrupt. 1997 Microchip Technology Inc. Note: Interrupt flag bits get set when an interrupt ...
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... Note 1: Bit ADIE is reserved on the PIC16C923, always maintain this bit clear. DS30444E - page 26 Note: Bit PEIE (INTCON<6>) must be set to enable any peripheral interrupt. R/W-0 R/W-0 R/W-0 R/W-0 SSPIE CCP1IE TMR2IE TMR1IE bit0 ( Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ Value at POR reset 1997 Microchip Technology Inc. ...
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... Interrupt flag bits get set when an interrupt condition occurs regardless of the state of its corresponding enable bit or the global enable bit, GIE (INTCON<7>). User software should ensure the appropriate interrupt flag bits are clear prior to enabling an interrupt. 1997 Microchip Technology Inc. Note: Interrupt flag bits get set when an interrupt ...
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... Unimplemented: Read as '0' DS30444E - page 28 For various reset conditions see Table 14-4 and Table 14-5. U-0 U-0 R/W-0 U-0 — — POR — bit0 R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ Value at POR reset 1997 Microchip Technology Inc. ...
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... The tenth push overwrites the second push (and so on). 1997 Microchip Technology Inc. Note 1: There are no status bits to indicate stack overflow or stack underflow conditions. Note 2: There are no instructions/mnemonics called PUSH or POP ...
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... IRP bank select 00h Bank 1 Bank 2 Bank 3 INDIRECT ADDRESSING 0x20 ;initialize pointer FSR ;to RAM INDF ;clear INDF register FSR,F ;inc pointer FSR,4 ;all done? NEXT ;no clear next ;yes continue Indirect Addressing 7 0 FSR register location select 7Fh 1997 Microchip Technology Inc. ...
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... Pin RA4 is multiplexed with the Timer0 module clock input to become the RA4/T0CKI pin. For the PIC16C924 only, other PORTA pins are multi- plexed with analog inputs and the analog V The operation of each pin is selected by clearing/set- ting the control bits in the ADCON1 register (A/D Con- trol Register1) ...
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... ST (1) RA5/AN4/SS bit5 TTL Legend: TTL = TTL input Schmitt Trigger input Note 1: The AN and V functions are for the A/D module and are only implemented on the PIC16C924. REF TABLE 5-2: SUMMARY OF REGISTERS ASSOCIATED WITH PORTA Address Name Bit 7 Bit 6 Bit 5 05h PORTA — ...
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... The input pins (of RB7:RB4) are compared with the old value latched on the last read of 1997 Microchip Technology Inc. PORTB. The “mismatch” outputs of RB7:RB4 are OR’ed together to generate the RB Port Change Inter- rupt with fl ...
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... Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 RB5 RB4 RB3 RB2 RB1 T0CS T0SE PSA PS2 PS1 Value on Value on all Bit 0 Power-on other resets Reset RB0 xxxx xxxx uuuu uuuu 1111 1111 1111 1111 PS0 1111 1111 1111 1111 1997 Microchip Technology Inc. ...
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... PORTC — — 87h TRISC — — Legend unknown unchanged unimplemented, read as '0'. Shaded cells are not used by PORTC. 1997 Microchip Technology Inc. FIGURE 5-5: PORTC BLOCK DIAGRAM (2) RBPU Data bus WR Port WR TRIS RB0/INT Note 1: I/O pins have diode protection enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU bit (OPTION< ...
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... RD<4:0> outputs MOVWF TRISD ;Make RD<7:5> inputs DS30444E - page 36 FIGURE 5-6: PORTD<4:0> BLOCK DIAGRAM LCD Segment Data LCD Segment Output Enable Data Bus PORT CK Data Latch TRIS CK TRIS Latch RD TRIS LCDSE<n> PORT 1997 Microchip Technology Inc. I/O pin Schmitt Trigger input buffer ...
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... RD6 88h TRISD PORTD Data Direction Control Register 10Dh LCDSE SE29 SE27 Legend: Shaded cells are not used by PORTD. 1997 Microchip Technology Inc. Digital Input/ LCD Output pin Schmitt Trigger input buffer Function Input/output port pin or Segment Driver00 Input/output port pin or Segment Driver01 ...
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... RE1 SE20 SE16 SE12 SE9 SE5 Digital Input/ LCD Output pin Schmitt Trigger input buffer Value on Value on all Bit 0 Power-on other resets Reset RE0 0000 0000 0000 0000 1111 1111 1111 1111 SE0 1111 1111 1111 1111 1997 Microchip Technology Inc. ...
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... RF6 187h TRISF PORTF Data Direction Control Register 10Dh LCDSE SE29 SE27 Legend: Shaded cells are not used by PORTF. 1997 Microchip Technology Inc. FIGURE 5-9: PORTF BLOCK DIAGRAM LCD Segment Data LCD Segment Output Enable LCD Common Data LCD Common Output Enable LCDSE< ...
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... RG1 SE20 SE16 SE12 SE9 SE5 Digital Input/ LCD Output pin Schmitt Trigger input buffer Value on Value on all Bit 0 Power-on other resets Reset RG0 0000 0000 0000 0000 1111 1111 1111 1111 SE0 1111 1111 1111 1111 1997 Microchip Technology Inc. ...
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... MOVWF PORTB MOVF PORTB,W fetched write to PORTB RB7:RB0 Instruction executed MOVWF PORTB write to PORTB 1997 Microchip Technology Inc. EXAMPLE 5-8: READ-MODIFY-WRITE INSTRUCTIONS ON AN I/O PORT ;Initial PORT settings: PORTB<7:4> Inputs ; ;PORTB<7:6> have external pull-ups and are ;not connected to other circuitry ; ; ; ...
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... PIC16C9XX NOTES: DS30444E - page 42 1997 Microchip Technology Inc. ...
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... Timer2 can be used with the CCP1 module (in PWM mode) as well as the clock source for the Syn- 1997 Microchip Technology Inc. PIC16C9XX chronous Serial Port (SSP). The prescaler option allows Timer2 to increment at the following rates: 1:1, 1:4, 1:16 ...
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... PIC16C9XX NOTES: DS30444E - page 44 1997 Microchip Technology Inc. ...
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... Fetch T0 T0+1 TMR0 Instruction Executed 1997 Microchip Technology Inc. bit T0SE selects the rising edge. Restrictions on the external clock input are discussed in detail in Section 7.2. The prescaler is mutually exclusively shared between the Timer0 module and the Watchdog Timer. The pres- caler assignment is controlled in software by control bit PSA (OPTION< ...
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... PC +1 Inst (PC+1) Inst (PC) Dummy cycle where T = instruction cycle time. CY PC+4 PC+5 PC+6 MOVF TMR0,W NT0+1 PC+6 Read TMR0 Read TMR0 reads NT0 reads NT0 + 01h 02h 0004h 0005h Inst (0004h) Inst (0005h) Dummy cycle Inst (0004h) 1997 Microchip Technology Inc. ...
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... Therefore, the error in measuring the interval between two edges on Timer0 input = 4Tosc max. 2: External clock if no prescaler selected, Prescaler output otherwise. 3: The arrows indicate the points in time where sampling occurs. 1997 Microchip Technology Inc. caler so that the prescaler output is symmetrical. For the external clock to meet the sampling requirement, the ripple-counter must be taken into account ...
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... Writing to TMR0 when the prescaler is assigned to Timer0 will clear the prescaler count, but will not change the prescaler assignment SYNC Cycles PSA 8-bit Prescaler 1MUX PS2:PS0 PSA WDT Time-out Data Bus 8 TMR0 reg Set flag bit T0IF on Overflow 1997 Microchip Technology Inc. ...
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... TRISA — — Legend unknown unchanged unimplemented locations read as '0'. Shaded cells are not used by Timer0. 1997 Microchip Technology Inc. Note: To avoid an unintended device RESET, the following instruction sequence (shown in Example 7-1) must be executed when changing the prescaler assignment from Timer0 to the WDT ...
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... PIC16C9XX NOTES: DS30444E - page 50 1997 Microchip Technology Inc. ...
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... Internal clock (Fosc/4) bit 0: TMR1ON: Timer1 On bit 1 = Enables Timer1 0 = Stops Timer1 1997 Microchip Technology Inc. Timer1 can be turned on and off using the control bit TMR1ON (T1CON<0>). Timer1 also has an internal “reset input”. This reset can be generated by the CCP module (Section 10.0). ...
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... Refer to the appropriate electrical specifica- tions, parameters 40, 42, 45, 46, and 47. 0 TMR1L 1 TMR1ON T1SYNC on/off 1 Prescaler T1OSCEN Fosc/4 Enable Internal 0 (1) Oscillator Clock T1CKPS1:T1CKPS0 TMR1CS Synchronized clock input Synchronize det 2 SLEEP input 1997 Microchip Technology Inc. ...
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... Reading the 16-bit value requires some care. Example 8 example routine to read the 16-bit timer value. This is useful if the timer cannot be stopped. 1997 Microchip Technology Inc. PIC16C9XX EXAMPLE 8-1: READING A 16-BIT FREE-RUNNING TIMER ; All interrupts are disabled ...
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... T1OSCEN T1SYNC TMR1CS Value on Value on Bit 1 Bit 0 Power-on all other Reset resets 0000 000x 0000 000u INTF RBIF 00-- 0000 00-- 0000 TMR2IF TMR1IF 00-- 0000 00-- 0000 TMR2IE TMR1IE xxxx xxxx uuuu uuuu xxxx xxxx uuuu uuuu --00 0000 --uu uuuu TMR1ON 1997 Microchip Technology Inc. ...
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... Timer2 is off bit 1-0: T2CKPS1:T2CKPS0: Timer2 Clock Prescale Select bits 00 = Prescaler Prescaler Prescaler is 16 1997 Microchip Technology Inc. 9.1 Timer2 Prescaler and Postscaler The prescaler and postscaler counters are cleared when any of the following occurs: • a write to the TMR2 register • a write to the T2CON register • ...
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... SSPIF CCP1IF TMR2IF — — SSPIE CCP1IE TMR2IE Value on Value on Bit 1 Bit 0 Power-on all other Reset resets 0000 000x 0000 000u RBIF 00-- 0000 00-- 0000 TMR1IF 00-- 0000 00-- 0000 TMR1IE 0000 0000 0000 0000 1111 1111 1111 1111 1997 Microchip Technology Inc. ...
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... Compare mode, generate software interrupt on match (bit CCP1IF is set, CCP1 pin is unaffected) 1011 = Compare mode, trigger special event (CCP1IF bit is set; CCP1 resets TMR1) 11xx = PWM mode 1997 Microchip Technology Inc. For use of the CCP module, refer to the Embedded Control Handbook, "Using the CCP Modules" (AN594). ...
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... This is not the data latch. CAPTURE PRESCALERS ; Turn CCP module off ; the new prescaler ; mode value and CCP ON ; Load CCP1CON with ; this value Set CCP1IF PIR1<2> CCPR1H CCPR1L Output Comparator Logic match TMR1H TMR1L 1997 Microchip Technology Inc. ...
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... Figure 10-4 shows a simplified block diagram of the CCP module in PWM mode. For a step by step procedure on how to set up the CCP module for PWM operation, see Section 10.3.3. 1997 Microchip Technology Inc. PIC16C9XX FIGURE 10-4: SIMPLIFIED PWM BLOCK DIAGRAM CCP1CON<5:4> Duty cycle registers ...
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... Set the TMR2 prescale value and enable Timer2 by writing to T2CON. 5. Configure the CCP module for PWM operation. 488 Hz 1.95 kHz 7.81 kHz 31.25 kHz 0xFF 0xFF 0xFF 0x3F • 1/8 MHz • 1 • 125 ns • 1 62.5 kHz 250 kHz 0x1F 0x07 1997 Microchip Technology Inc. ...
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... CCP1CON — — Legend unknown unchanged unimplemented locations read as '0’. Shaded cells are not used in this mode. Note 1: Bits ADIE and ADIF reserved on the PIC16C923, always maintain these bits clear. 1997 Microchip Technology Inc. Bit 5 Bit 4 Bit 3 Bit 2 T0IE INTE ...
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... PIC16C9XX NOTES: DS30444E - page 62 1997 Microchip Technology Inc. ...
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... Transmit (I C mode only Transmit in progress, SSPBUF is full 0 = Transmit complete, SSPBUF is empty 1997 Microchip Technology Inc. play drivers, A/D converters, etc. The SSP module can operate in one of two modes: • Serial Peripheral Interface (SPI) • Inter-Integrated Circuit (I Refer to Application Note AN578, "Use of the SSP ...
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... C slave mode, 10-bit address with start and stop bit interrupts enabled DS30444E - page 64 R/W-0 R/W-0 R/W-0 R/W-0 SSPM3 SSPM2 SSPM1 SSPM0 bit0 /4 OSC /16 OSC /64 OSC R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ =Value at POR reset 1997 Microchip Technology Inc. ...
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... Additionally a fourth pin may be used when in a slave mode of operation: • Slave Select (SS) RA5/AN4/SS (the AN4 function is implemented on the PIC16C924 only) When initializing the SPI, several options need to be specified. This is done by programming the appropriate control bits in the SSPCON register (SSPCON<5:0>) and SSPSTAT< ...
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... In sleep mode, the slave can transmit and receive data and wake the device from sleep. SPI Slave SSPM3:SSPM0 = 010xb SDO SDI SDI SDO LSb Serial Clock SCK SCK ) Serial Input Buffer (SSPBUF) Shift Register (SSPSR) MSb LSb PROCESSOR 2 1997 Microchip Technology Inc. ...
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... SS (optional) SCK (CKP = 0) SCK (CKP = 1) bit7 SDO SDI (SMP = 0) bit7 SSPIF 1997 Microchip Technology Inc. Note: When the SPI is in Slave Mode with SS pin control enabled, (SSPCON<3:0> = 0100) the SPI module will reset if the SS pin is set Note: If the SPI is used in Slave Mode with CKE = '1', then the SS pin control must be enabled ...
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... Value on Value on all Bit 0 Power-on other resets Reset RBIF 0000 000x 0000 000u TMR1IF 00-- 0000 00-- 0000 TMR1IE 00-- 0000 00-- 0000 xxxx xxxx uuuu uuuu SSPM0 0000 0000 0000 0000 --11 1111 --11 1111 --11 1111 --11 1111 UA BF 0000 0000 0000 0000 1997 Microchip Technology Inc. ...
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... Procedure that ensures that only one of the master devices will control the bus. This ensure that the transfer data does not get corrupted. Synchronization Procedure where the clock signals of two or more devices are synchronized. 1997 Microchip Technology Inc. PIC16C9XX The output stages of the clock (SCL) and data (SDA) lines must have an open-drain or open-collector in order to perform the wired-AND function of the bus ...
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... R/W ACK Wait Data State ACKNOWLEDGE not acknowledge acknowledge Clock Pulse for Acknowledgment acknowledgment signal from receiver Stop ACK Condition 1997 Microchip Technology Inc. ...
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... From master to slave S = Start Condition From slave to master P = Stop Condition 1997 Microchip Technology Inc. is high), but occurs after a data transfer acknowledge pulse (not the bus-free state). This allows a master to send “commands” to the slave and then receive the requested information or to address a different slave device ...
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... The first device to complete its high period will pull the SCL line low. The SCL line high time is determined by the device with the shortest high period, Figure 11-17. FIGURE 11-17: CLOCK SYNCHRONIZATION start counting wait state HIGH period CLK 1 counter CLK reset 2 SCL 1997 Microchip Technology Inc. ...
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... SSP Status Register (SSPSTAT) • Serial Receive/Transmit Buffer (SSPBUF) • SSP Shift Register (SSPSR) - Not directly acces- sible • SSP Address Register (SSPADD) 1997 Microchip Technology Inc. The SSPCON register allows control of the I tion. Four mode selection bits (SSPCON<3:0>) allow one of the following I 2 • ...
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... Receive first (high) byte of Address (bits SSPIF and BF are set). 9. Read the SSPBUF register (clears bit BF) and clear flag bit SSPIF. Generate ACK SSPBUF Pulse Yes Yes Set bit SSPIF (SSP Interrupt occurs if enabled) Yes Yes Yes Yes 1997 Microchip Technology Inc. ...
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... R/W=0 SDA SCL S SSPIF (PIR1<3>) BF (SSPSTAT<0>) SSPOV (SSPCON<6>) 1997 Microchip Technology Inc. An SSP interrupt is generated for each data transfer byte. Flag bit SSPIF (PIR1<3>) must be cleared in soft- ware. The SSPSTAT register is used to determine the status of the byte. Receiving Data ACK ACK ...
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... CPU responds to SSPIF cleared in software SSPBUF is written in software Set bit after writing to SSPBUF (the SSPBUF must be written-to before the CKP bit can be set) the SSPSR register. Then Transmitting Data ACK From SSP interrupt service routine 1997 Microchip Technology Inc. pin ...
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... Legend unknown unchanged unimplemented read as '0'. Shaded cells are not used by SSP in I Note 1: Bits ADIE and ADIF are reserved on the PIC16C923, always maintain these bits clear. 1997 Microchip Technology Inc. 11.3.3 MULTI-MASTER MODE In multi-master mode, the interrupt generation on the detection of the START and STOP conditions allows the determination of when the bus is free ...
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... PRIOR_ADDR_MATCH = FALSE; } DS30444E - page MODULE IN IDLE_MODE, RCV_MODE OR XMIT_MODE Set interrupt Send ACK = 0; set XMIT_MODE; } else if (R set RCV_MODE; End of transmission; Go back to IDLE_MODE; { PRIOR_ADDR_MATCH = TRUE; Send ACK = 0; while (SSPADD not updated) Hold SCL low; Clear Set RCV_MODE; } 1997 Microchip Technology Inc. ...
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... ANALOG-TO-DIGITAL CONVERTER (A/D) MODULE This section applies to the PIC16C924 only. The analog-to-digital (A/D) converter module has five inputs. The A/D allows conversion of an analog input signal to a corresponding 8-bit digital number (refer to Applica- tion Note AN546 for use of A/D Converter). The output ...
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... The A/D conversion time per bit is defined minimum wait required before next acquisition starts Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ Value at POR reset RA3 V REF A VDD RA3 REF A VDD RA3 REF A VDD — 1997 Microchip Technology Inc. ...
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... FIGURE 12-3: A/D BLOCK DIAGRAM A/D Converter V REF (Reference voltage) 1997 Microchip Technology Inc. CHS2:CHS0 V AIN (Input voltage) A VDD 000 or 010 or 100 001 or 011 PCFG2:PCFG0 PIC16C9XX 100 RA5/AN4 011 RA3/AN3/V REF 010 RA2/AN2 001 RA1/AN1 000 RA0/AN0 DS30444E - page 81 ...
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... 5.747 C)(0.05 s/ C)] ACQ 10.747 s + 1.25 s 11.997 Sampling Switch leakage V = 0.6V T 500 has no REF ) is HOLD delay must complete before AD MINIMUM REQUIRED SAMPLE TIME ( ln(1/511 HOLD = DAC capacitance = 51 Sampling Switch ( k ) 1997 Microchip Technology Inc. ...
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... For faster conversion times, the selection of another clock source is recommended. 4: When derived frequency is greater than 1 MHz, the RC A/D conversion clock source is recommended for sleep mode only 5: For extended voltage devices (LC), please refer to the electrical specifications section. 1997 Microchip Technology Inc. 12.3 Configuring Analog Port Pins . The ...
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... RC Clock, A/D is on, Channel 0 is selected ; ; Clear A/D interrupt flag bit ; Enable peripheral interrupts ; Enable all interrupts ; Start A/D Conversion ; The ADIF bit will be set and the GO/DONE bit ; is cleared upon completion of the A/D Conversion. wait AD 1997 Microchip Technology Inc. ...
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... N • N)( OSC 1997 Microchip Technology Inc. Since the T AD user must use some method (a timer, software loop, etc.) to determine when the A/D oscillator may be changed. Example 12-3 shows a comparison of time required for a conversion with 4-bits of resolution, ver- sus the 8-bit resolution conversion. The example is for ...
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... The value that is in the ADRES register is not modifi (over DD REF for a Power-on Reset. The ADRES register will contain unknown data after a Power-on Reset should be derived from the device oscil kept away from on-chip OSC 1997 Microchip Technology Inc. , ...
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... Any external components connected (via hi-impedance analog input pin (capacitor, zener diode, etc.) should have very little leakage current at the pin. 1997 Microchip Technology Inc. 12.10 Transfer Function The ideal transfer function of the A/D converter is as fol- lows: the first transition occurs when the analog input ...
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... Value on all Bit 1 Bit 0 Power-on other Resets Reset 0000 000x 0000 000u INTF RBIF 00-- 0000 00-- 0000 TMR1IF 00-- 0000 00-- 0000 TMR1IE xxxx xxxx uuuu uuuu (1) 0000 0000 0000 0000 ADON ---- -000 ---- -000 PCFG0 --0x 0000 --0u 0000 RA1 RA0 --11 1111 --11 1111 1997 Microchip Technology Inc. ...
Page 89
... Microchip Technology Inc. Once the module is initialized for the LCD panel, the individual bits of the LCD data registers are cleared/set to represent a clear/dark pixel respectively. Once the module (LCDCON<7>) bit is used to enable or disable the LCD module. The LCD panel can also operate during sleep by clearing the SLPEN (LCDCON< ...
Page 90
... LP3 LP2 LP1 LP0 bit0 Frame Frequency = Clock source / (128 * (LP3:LP0 + 1)) Clock source / (128 * (LP3:LP0 + 1)) Clock source / (96 * (LP3:LP0 + 1)) Clock source / (128 * (LP3:LP0 + 1)) TO I/O PADS R =Readable bit W =Writable bit U =Unimplemented bit, Read as ‘0’ -n =Value at POR reset 1997 Microchip Technology Inc. ...
Page 91
... FIGURE 13-4: WAVEFORMS IN STATIC DRIVE COM0 COM0-SEG0 COM0-SEG1 1997 Microchip Technology Inc. COM0 SEG0 SEG1 1 Frame PIC16C9XX DS30444E - page 91 ...
Page 92
... PIC16C9XX FIGURE 13-5: WAVEFORMS IN 1/2 MUX, 1/3 BIAS DRIVE COM0 COM1 COM0 COM1 SEG0 SEG1 COM0-SEG0 COM0-SEG1 DS30444E - page Frame -V 3 1997 Microchip Technology Inc. ...
Page 93
... FIGURE 13-6: WAVEFORMS IN 1/3 MUX, 1/3 BIAS COM0 COM2 COM1 COM1 COM0 COM2 SEG0 SEG1 COM0-SEG0 COM0-SEG1 1997 Microchip Technology Inc. PIC16C9XX Frame DS30444E - page 93 ...
Page 94
... PIC16C9XX FIGURE 13-7: WAVEFORMS IN 1/4 MUX, 1/3 BIAS COM3 COM2 COM1 COM0 COM0-SEG0 COM0-SEG1 DS30444E - page 94 COM0 COM1 COM2 COM3 SEG0 SEG1 1 Frame 1997 Microchip Technology Inc. ...
Page 95
... Internal RC oscillator Nominal kHz RC CS1:CS0 1997 Microchip Technology Inc. The second source is the Timer1 external oscillator. This oscillator provides a lower speed clock which may be used to continue running the LCD while the proces- sor is in sleep assumed that the frequency pro- vided on this oscillator will be 32 kHz. To use the Timer1 oscillator as a LCD module clock source only necessary to set the T1OSCEN (T1CON< ...
Page 96
... TABLE 13-2: APPROX. FRAME FREQ IN Hz LMUX1:LMUX0 LP3:LP0 TABLE 13-3: APPROX. FRAME FREQ IN Hz LP3:LP0 USING TIMER1 @ 32.768 kHz OR Fosc @ 8 MHz Static 1/2 1/3 1 114 USING INTERNAL RC OSC @ 14 kHz Static 1/2 1/3 1/4 109 109 146 109 1997 Microchip Technology Inc. ...
Page 97
... FWR CY 1997 Microchip Technology Inc. A new frame is defined to begin at the leading edge of the COM0 common signal. The interrupt will be set immediately after the LCD controller completes accessing all pixel data required for a frame. This will occur at a certain fixed time before the frame boundary as shown in Figure 13-9 ...
Page 98
... Any LCD pixel location not being used for display can be used as general purpose RAM. R/W-x R/W-x R/W-x R/W-x SEGs SEGs SEGs SEGs COMc COMc COMc COMc bit0 R =Readable bit W =Writable bit U =Unimplemented bit, Read as ‘0’ -n =Value at POR reset 1997 Microchip Technology Inc. ...
Page 99
... COM3 Pin SEG0 interrupted frame SLEEP instruction execution 1997 Microchip Technology Inc. PIC16C9XX The LCD interrupt can be used to determine the frame boundary. See Section 13.2 for the formulas to calcu- late the delay SLEEP instruction is executed and SLPEN = '0', the module will continue to display the current contents of the LCDD registers ...
Page 100
... RE3/SEG08 - RE0/SEG05 RD4/SEG04 - RD0/SEG00 SEGMENTS ;Select Bank 2 ; ;Make PortD,E,F,G ;LCD pins ;configure rest of LCD SEGMENTS ;Select Bank 2 ; ;Make PORTD<7:0> & ;PORTE<6:0> LCD pins ;configure rest of LCD R =Readable bit W =Writable bit U =Unimplemented bit, Read as ‘0’ -n =Value at POR reset 1997 Microchip Technology Inc. ...
Page 101
... These values are provided for design guidance only and should be optimized to the application by the designer. 1997 Microchip Technology Inc. 2*V 1 and V LCD is not operating, Vlcd3 will be internally tied to V the Electrical Specifications section for charge pump capacitor and potentiometer values. ...
Page 102
... COM2 COM2 SEG01 SEG00 xxxx xxxx uuuu uuuu COM3 COM3 SEG09 SEG08 xxxx xxxx uuuu uuuu COM3 COM3 SEG17 SEG16 xxxx xxxx uuuu uuuu COM3 COM3 SEG25 SEG24 xxxx xxxx uuuu uuuu COM3 COM3 1997 Microchip Technology Inc. ...
Page 103
... XT oscillator oscillator Note 1: All of the CP1:CP0 bits have to be given the same value to enable the code protection scheme listed. 1997 Microchip Technology Inc. the Oscillator Start-up Timer (OST), intended to keep the chip in reset until the crystal oscillator is stable. The other is the Power-up Timer (PWRT), which provides a fi ...
Page 104
... Cap. Range Cap. Range Freq kHz 200 kHz 200 kHz 47-68 pF 47- MHz MHz MHz MHz 15-33 pF 15-33 pF Crystals Used Epson C-001R32.768K-A 20 PPM STD XTL 200.000KHz 20 PPM ECS ECS-10-13-1 50 PPM ECS ECS-40-20-1 50 PPM EPSON CA-301 8.000M-C 30 PPM 1997 Microchip Technology Inc. ...
Page 105
... OSCILLATOR CIRCUIT 330 k 330 k 74AS04 74AS04 74AS04 0.1 F XTAL 1997 Microchip Technology Inc. 14.2.4 RC OSCILLATOR For timing insensitive applications the “RC” device option offers additional cost savings. The RC oscillator frequency is a function of the supply voltage, the resis- tor (R ) and capacitor (C EXT ing temperature ...
Page 106
... Figure 14-7. The devices all have a MCLR noise filter in the MCLR reset path. The filter will detect and ignore small pulses. It should be noted that a WDT Reset does not drive MCLR pin low. (2) Enable PWRT (2) Enable OST 1997 Microchip Technology Inc. S Chip_Reset R Q ...
Page 107
... TABLE 14-3: TIME-OUT IN VARIOUS SITUATIONS Oscillator Configuration XT, HS 1997 Microchip Technology Inc. 14.4.3 OSCILLATOR START-UP TIMER (OST) The Oscillator Start-up Timer (OST) provides 1024 oscillator cycle (from OSC1 input) delay after the PWRT delay is over. This ensures that the crystal oscil- lator or resonator has started and stabilized ...
Page 108
... PCON Register ---- --0- ---- --u- ---- --u- ---- --u- ---- --u- ---- --u- Wake-up via WDT or Interrupt uuuu uuuu N/A uuuu uuuu ( (3) (3) uuuq quuu uuuu uuuu --uu uuuu (5) --uu uuuu uuuu uuuu --uu uuuu 1997 Microchip Technology Inc. ...
Page 109
... When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector (0004h). 3: See Table 14-5 for reset value for specific condition. 4: Bits PIE1<6> and PIR1<6> are reserved on the PIC16C923, always maintain these bits clear. 5: PORTA values when read. 1997 Microchip Technology Inc. Power-on Reset MCLR Resets WDT Reset 0000 0000 ...
Page 110
... Wake-up via WDT or Interrupt uuuu uuuu ---- uuuu uu-u uuuu uuuu uuuu uuuu uuuu uuuu uuuu 1997 Microchip Technology Inc. ...
Page 111
... FIGURE 14-9: TIME-OUT SEQUENCE ON POWER-UP (MCLR NOT TIED MCLR INTERNAL POR PWRT TIME-OUT OST TIME-OUT INTERNAL RESET FIGURE 14-10:TIME-OUT SEQUENCE ON POWER-UP (MCLR TIED MCLR INTERNAL POR PWRT TIME-OUT OST TIME-OUT INTERNAL RESET 1997 Microchip Technology Inc. PIC16C9XX T PWRT T OST DD T PWRT T OST ) DD T PWRT T ...
Page 112
... Note 1: This brown-out circuit is less expensive, albeit less accurate. Transistor Q1 turns off when V such that: 2: Resistors should be adjusted for the characteristics of the transistors. PROTECTION CIRCUIT 10k MCLR 40k PIC16CXXX DD PROTECTION CIRCUIT MCLR 40k PIC16CXXX is below a certain level 0.7V V • 1997 Microchip Technology Inc. ...
Page 113
... Individual interrupt flag bits are set regard- less of the status of their corresponding mask bit or the GIE bit. 1997 Microchip Technology Inc. A global interrupt enable bit, GIE (INTCON<7>) enables (if set) all un-masked interrupts or disables (if cleared) all interrupts. When bit GIE is enabled, and an interrupt’ ...
Page 114
... PIC16C9XX FIGURE 14-14:INTERRUPT LOGIC TMR1IF TMR1IE TMR2IF TMR2IE LCDIF LCDIE CCP1IF CCP1IE SSPIF SSPIE ADIF ADIE The A/D module interrupt is implemented on the PIC16C924 only. FIGURE 14-15:INT PIN INTERRUPT TIMING OSC1 CLKOUT 3 4 INT pin 1 INTF flag 5 (INTCON<1>) GIE bit (INTCON<7>) INSTRUCTION FLOW ...
Page 115
... MOVWF STATUS SWAPF W_TEMP,F SWAPF W_TEMP,W 1997 Microchip Technology Inc. 14.6 Context Saving During Interrupts During an interrupt, only the return PC value is saved on the stack. Typically, users may wish to save key reg- isters during an interrupt i.e., W register and STATUS register. This will have to be implemented in software. ...
Page 116
... MUX PSA 0 1 MUX WDT Time-out Bit 6 Bit 5 Bit 4 Bit 3 (1) CP1 CP0 PWRTE INTEDG T0CS T0SE PSA = Min., Temperature = Max., and DD PS2:PS0 To TMR0 (Figure 7-6) PSA Bit 2 Bit 1 Bit 0 (1) WDTE FOSC1 FOSC0 PS2 PS1 PS0 1997 Microchip Technology Inc. ...
Page 117
... Special event trigger (Timer1 in asynchronous mode using an external clock). 7. LCD module. 1997 Microchip Technology Inc. Other peripherals can not generate interrupts since during SLEEP, no on-chip Q clocks are present. When the SLEEP instruction is being executed, the next instruction ( pre-fetched. For the device to wake-up through an interrupt event, the corresponding interrupt enable bit must be set (enabled) ...
Page 118
... PIC16C6X/7X Programming Specifications (Literature #DS30228). FIGURE 14-19:TYPICAL IN-CIRCUIT SERIAL External Connector Signals + CLK Data I 0004h 0005h Inst(0004h) Inst(0005h) Dummy cycle Inst(0004h) PROGRAMMING CONNECTION To Normal Connections PIC16CXXX MCLR/V PP RB6 RB7 Normal Connections 1997 Microchip Technology Inc. ...
Page 119
... OPCODE k (literal 8-bit immediate value CALL and GOTO instructions only OPCODE k (literal 11-bit immediate value 1997 Microchip Technology Inc. TABLE 15-1: OPCODE FIELD DESCRIPTIONS Field f Register file address (0x00 to 0x7F) W Working register (accumulator) b Bit address within an 8-bit file register k Literal field, constant data or label ...
Page 120
... TO 00 0000 0110 0011 1 C,DC,Z 11 110x kkkk kkkk 1010 kkkk kkkk 1997 Microchip Technology Inc. Notes 1,2 1,2 2 1,2 1,2 1,2,3 1,2 1,2,3 1,2 1,2 1,2 1,2 1,2 1,2 1,2 1,2 1 ...
Page 121
... W register Words: 1 Cycles Cycle Activity Decode Read literal 'k' ADDLW 0x15 Example: Before Instruction W = 0x10 After Instruction W = 0x25 1997 Microchip Technology Inc. ADDWF Syntax: Operands: Operation: Status Affected: kkkk kkkk Encoding: Description: . Words Cycles: Process Write to Q Cycle Activity: data W Example PIC16C9XX ...
Page 122
... After Instruction W = 0x17 FSR = 0x02 Bit Clear f [ label ] BCF f 127 (f<b>) None 01 00bb bfff ffff . Bit 'b' in register 'f' is cleared Decode Read Process Write register data register 'f' 'f' BCF FLAG_REG, 7 Before Instruction FLAG_REG = 0xC7 After Instruction FLAG_REG = 0x47 1997 Microchip Technology Inc. ...
Page 123
... Bit 'b' in register 'f' is set. Words: 1 Cycles Cycle Activity Decode Read register 'f' BSF FLAG_REG, Example Before Instruction FLAG_REG = 0x0A After Instruction FLAG_REG = 0x8A 1997 Microchip Technology Inc. BTFSC Syntax: Operands: Operation: Status Affected: Encoding: bfff ffff Description Words: Process Write data register 'f' Cycles: Q Cycle Activity: ...
Page 124
... PC are loaded from PCLATH. CALL is a two cycle instruction Decode Read Process Write to literal 'k', data PC Push PC to Stack No- No- No- No- Operation Operation Operation Operation HERE CALL THERE Before Instruction PC = Address HERE After Instruction PC = Address THERE TOS = Address HERE+1 1997 Microchip Technology Inc. ...
Page 125
... Z bit is set. Words: 1 Cycles Cycle Activity Decode Read register 'f' CLRF FLAG_REG Example Before Instruction FLAG_REG After Instruction FLAG_REG Z 1997 Microchip Technology Inc. CLRW Syntax: Operands: Operation: Status Affected: 1fff ffff Encoding: Description: Words: Cycles Cycle Activity: Process Write data register 'f' Example ...
Page 126
... Z 00 0011 dfff ffff Decrement register 'f the result is stored in the W register the result is stored back in register ' Decode Read Process Write to register data destination 'f' DECF CNT, 1 Before Instruction CNT = 0x01 After Instruction CNT = 0x00 1997 Microchip Technology Inc. ...
Page 127
... Before Instruction address PC = After Instruction CNT = CNT - 1 if CNT = address CONTINUE if CNT address HERE+1 1997 Microchip Technology Inc. GOTO Syntax: Operands: Operation: Status Affected: Encoding: dfff ffff Description: Words: instruc- CY Cycles: Q Cycle Activity: 1st Cycle Q3 Q4 2nd Cycle Process ...
Page 128
... Process Write to register 'f' data destination (2nd Cycle No- No- No- No- Operation Operation Operation Operation HERE INCFSZ CNT, 1 GOTO LOOP CONTINUE • • • Before Instruction PC = address HERE After Instruction CNT = CNT + 1 if CNT address CONTINUE if CNT address HERE +1 1997 Microchip Technology Inc. ...
Page 129
... Cycles Cycle Activity Decode Read literal 'k' IORLW 0x35 Example Before Instruction W = 0x9A After Instruction W = 0xBF 1997 Microchip Technology Inc. IORWF Syntax: Operands: Operation: Status Affected: kkkk kkkk Encoding: Description: . Words: Cycles Cycle Activity: Process Write to data W Example PIC16C9XX Inclusive OR W with f ...
Page 130
... Process Write to data W Move label ] MOVWF 127 (W) (f) None 00 0000 1fff ffff Move data from W register to register . ' Decode Read Process Write register data register 'f' 'f' MOVWF OPTION_REG Before Instruction OPTION = 0xFF W = 0x4F After Instruction OPTION = 0x4F W = 0x4F 1997 Microchip Technology Inc. ...
Page 131
... PIC16C5X products. Since OPTION is a readable/writable register, the user can directly address it. Words: 1 Cycles: 1 Example To maintain upward compatibility with future PIC16CXX products, do not use this instruction. 1997 Microchip Technology Inc. RETFIE Syntax: Operands: Operation: Status Affected: 0xx0 0000 Encoding: Description ...
Page 132
... Return from subroutine. The stack is POPed and the top of the stack (TOS) is loaded into the program counter. This is a two cycle instruction Decode No- No- Pop from Operation Operation the Stack No- No- No- No- Operation Operation Operation Operation RETURN After Interrupt PC = TOS 1997 Microchip Technology Inc. ...
Page 133
... Words: 1 Cycles Cycle Activity Decode Read register 'f' RLF REG1,0 Example Before Instruction REG1 C After Instruction REG1 W C 1997 Microchip Technology Inc. RRF Syntax: Operands: Operation: Status Affected: dfff ffff Encoding: Description: Words: Cycles Cycle Activity: Process Write to data destination Example = 1110 0110 ...
Page 134
... The result is placed in the W register Decode Read Process Write to W literal 'k' data SUBLW 0x02 Before Instruction After Instruction result is positive Before Instruction After Instruction result is zero Before Instruction After Instruction W = 0xFF result is nega- tive 1997 Microchip Technology Inc. ...
Page 135
... Before Instruction REG1 = After Instruction REG1 = 0xFF result is negative 1997 Microchip Technology Inc. SWAPF Syntax: Operands: Operation: Status Affected: dfff ffff Encoding: Description: Words: Cycles Cycle Activity: Process Write to data destination Example TRIS Syntax: Operands: Operation: Status Affected: None Encoding: Description: ...
Page 136
... Exclusive OR the contents of the W register with register 'f the result is stored in the W register the result is stored back in register 'f Decode Read Process Write to register data destination 'f' REG XORWF 1 Before Instruction REG = 0xAF W = 0xB5 After Instruction REG = 0x1A W = 0xB5 1997 Microchip Technology Inc. ...
Page 137
... PICSTART Plus is not recommended for production programming. PICSTART Plus supports all PIC12CXXX, PIC14C000, PIC16C5X, PIC16CXXX and PIC17CXX devices with pins. Larger pin count devices such as the PIC16C923 and PIC16C924 may be supported with an adapter socket. PIC16C9XX through Pentium and V ...
Page 138
... PICDEM-3 Low-Cost PIC16CXXX Demonstration Board The PICDEM simple demonstration board that supports the PIC16C923 and PIC16C924 in the PLCC package. It will also support future 44-pin PLCC microcontrollers with a LCD Module. All the neces- sary hardware and software is included to run the basic demonstration programs. The user can pro- ...
Page 139
... TECH-MP, edition for imple- menting more complex systems. Both versions include Microchip’s fuzzy LAB stration board for hands-on experience with fuzzy logic systems implementation. 1997 Microchip Technology Inc. 16.14 MP-DriveWay Generator MP-DriveWay is an easy-to-use Windows-based Appli- cation Code Generator. With MP-DriveWay you can visually confi ...
Page 140
... PIC16C9XX TABLE 16-1: DEVELOPMENT TOOLS FROM MICROCHIP Products Emulator DS30444E - page 140 Tools Software Programmers Boards Demo 1997 Microchip Technology Inc. ...
Page 141
... It is recommended that the user select the device type that ensures the specifications required. 1997 Microchip Technology Inc. (except V , MCLR, and RA4).......................................... -0. > DIS PIC16C923-08 PIC16LC923-04 PIC16C924-08 PIC16LC924- 2.5V to 6.0V DD 2.7 mA typ 3.8 mA max. at 3.0V DD 1.5 A typ max Freq: 4 MHz max 2.5V to 6.0V DD 2.7 mA typ ...
Page 142
... SLEEP mode without losing RAM data. measurements in active operation mode are: /2Rext (mA) with Rext in kOhm. measurement. T +85˚C for industrial and A T +70˚C for commercial A Conditions = 4 MHz 5.5V (Note kHz 4. MHz 5. 4.0V = 4.0V = 4.0V (Note 7) = 4.0V (Note 7) = 4.0V DD and 1997 Microchip Technology Inc. ...
Page 143
... LCD Module and the voltage generation cir- LCDT LCDRC cuitry. This does not include current dissipated by the LCD panel. 1997 Microchip Technology Inc. PIC16LC923/924-04 (Commercial, Industrial) Standard Operating Conditions (unless otherwise stated) Operating temperature -40˚C 0˚ ...
Page 144
... For entire V range DD 4.5V V 5.5V DD Note1 4.5V V 5.5V DD For entire V range DD Note1 = 5V PIN Pin at hi-Z PIN PIN XT, HS and LP osc PIN DD configuration I = 4 1 -3 -1 nal clock is used to drive OSC1. RA4 pin 1997 Microchip Technology Inc. ...
Page 145
... VLCDADJ regulated current output VADJ D252 VLCDADJ current V VADJ DD D265* V VLCDADJ voltage limits PIC16C92X VADJ * These parameters are characterized but not tested. Note 1: For design guidance only. 1997 Microchip Technology Inc. D224 Min Typ† Max Units V - 0.3 — Vss + 7.0 DD — — LCD — ...
Page 146
... C specifications only Hold ST DAT DATA input hold STA START condition DS30444E - page 146 specifications only specifications only) T Time osc OSC1 SCK T0CKI t1 T1CKI Period R Rise V Valid Z Hi-impedance High High Low Low SU Setup STO STOP condition 1997 Microchip Technology Inc. ...
Page 147
... FIGURE 17-2: LOAD CONDITIONS Load condition 1 Pin R = 464 1997 Microchip Technology Inc. Load condition Pin V SS for all pins except OSC2 unless otherwise noted. for OSC2 output PIC16C9XX DS30444E - page 147 ...
Page 148
... LP osc mode ns XT and RC osc mode ns HS osc mode s LP osc mode ns RC osc mode ns XT osc mode ns HS osc mode s LP osc mode 4/F CY OSC ns XT oscillator s LP oscillator ns HS oscillator ns XT oscillator ns LP oscillator ns HS oscillator 1997 Microchip Technology Inc. ...
Page 149
... Data in "Typ" column is at 5V, 25˚C unless otherwise stated. These parameters are for design guidance only and are not tested. †† These parameters are asynchronous events not related to any internal clock edges. Note 1: Measurements are taken in RC Mode where CLKOUT output 1997 Microchip Technology Inc ...
Page 150
... Data in "Typ" column is at 5V, 25˚C unless otherwise stated. These parameters are for design guidance only and are not tested. DS30444E - page 150 Min Typ† Max Units 2 — — 5V, -40˚C to +85˚C DD — 1024T — — T OSC OSC 28 72 132 5V, -40˚C to +85˚C DD — — 2.1 s 1997 Microchip Technology Inc. 34 Conditions = OSC1 period ...
Page 151
... TCKEZtmr1 Delay from external clock edge to timer increment * These parameters are characterized but not tested. † Data in "Typ" column is at 5V, 25˚C unless otherwise stated. These parameters are for design guidance only and are not tested. 1997 Microchip Technology Inc. PIC16C9XX ...
Page 152
... DS30444E - page 152 Min 0. PIC16LC923/924 20 0. PIC16LC923/924 PIC16C923/924 — PIC16LC923/924 — PIC16C923/924 — PIC16LC923/924 — Typ† Max Units Conditions — — ns — — ns — — ns — — ns — — ns — — ns — — prescale value (1 1997 Microchip Technology Inc. ...
Page 153
... Refer to Figure 17-2 for load conditions. FIGURE 17-9: SPI MASTER MODE TIMING (CKE = SCK (CKP = SCK (CKP = 1) SDO MSb SDI MSb IN 74 Refer to Figure 17-2 for load conditions. 1997 Microchip Technology Inc MSb BIT6 - - - - - -1 75, 76 BIT6 - - - - LSb BIT6 - - - - - -1 75, 76 BIT6 - - - -1 LSb IN ...
Page 154
... FIGURE 17-11:SPI SLAVE MODE TIMING (CKE = SCK (CKP = 0) 71 SCK (CKP = 1) MSb SDO SDI SDI MSb IN 74 Refer to Figure 17-2 for load conditions. DS30444E - page 154 MSb BIT6 - - - - - -1 75, 76 BIT6 - - - - BIT6 - - - - - -1 LSb 75, 76 BIT6 - - - -1 LSb LSb 77 LSb 1997 Microchip Technology Inc. ...
Page 155
... Tb2b Delay between consecutive bytes * Characterized but not tested. † Data in "Typ" column is at 5V, 25˚C unless otherwise stated. These parameters are for design guidance only and are not tested. 1997 Microchip Technology Inc. PIC16C9XX Min Typ† Max T — — ...
Page 156
... STOP Condition Conditions Only relevant for repeated START ns condition After this period the first clock ns pulse is generated ns ns 1997 Microchip Technology Inc. ...
Page 157
... Characterized but not tested. Note transmitter, the device must provide this internal minimum delay time to bridge the undefined region (min. 300 ns) of the falling edge of SCL to avoid unintended generation of START or STOP conditions. 1997 Microchip Technology Inc. 100 101 106 107 ...
Page 158
... PIC16C9XX TABLE 17-12:A/D CONVERTER CHARACTERISTICS: PIC16C924-04 (COMMERCIAL, INDUSTRIAL) PIC16LC924-04 (COMMERCIAL, INDUSTRIAL) Param Sym Characteristic No. A01 N Resolution R A02 E Total Absolute error ABS A03 E Integral linearity error IL A04 E Differential linearity error DL A05 E Full scale error FS A06 E Offset error OFF A10 — Monotonicity A20 ...
Page 159
... Note 1: If the A/D clock source is selected as RC, a time of T SLEEP instruction to be executed. TABLE 17-13:A/D CONVERSION REQUIREMENTS Param Sym Characteristic No. PIC16C924 130 T A/D clock period AD PIC16LC924 PIC16C924 PIC16LC924 131 T Conversion time (not including S/H time) CNV (Note 1) 132 T Acquisition time ACQ 134 ...
Page 160
... PIC16C9XX NOTES: DS30444E - page 160 1997 Microchip Technology Inc. ...
Page 161
... DISABLED, RC MODE - +85 C) 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 2.5 3.0 3.5 4.0 4 OLTS 1997 Microchip Technology Inc. (WDT FIGURE 18-3: TYPICAL I DD 25.0 20.0 15.0 10.0 5.0 0.0 2.5 FIGURE 18-4: MAXIMUM I 5.0 5.5 6.0 40.0 35.0 (WDT DD 30.0 25 ...
Page 162
... LCD panel connected to the PIC16C9XX. PD vs. V (LCD PD DD (1) ( TIMER1 (32 kHz ), RC MODE @ 25 C) 3.0 3.5 4.0 4.5 5.0 5.5 6 OLTS vs. V (LCD PD DD (1) ( TIMER1(32 kHz ), RC MODE - +85 C) 3.0 3.5 4.0 4.5 5.0 5.5 6 OLTS 1997 Microchip Technology Inc. ...
Page 163
... OLTS FIGURE 18-11:TYPICAL RC OSCILLATOR FREQUENCY vs. V Cext = 300 pF 1000 900 800 700 600 500 400 300 200 100 0 2.5 3.0 3.5 4.0 4 OLTS 1997 Microchip Technology Inc. FIGURE 18-12:TYPICAL 10k 100k 5 0 5.5 6.0 2.5 3.0 FIGURE 18-13:MAXIMUM 3. 10k 100k ...
Page 164
... Shaded area is Frequency (MHz) beyond recommended range 2.00 3.00 Frequency (MHz) Shaded area is beyond recommended range 6.0V 5.5V 5.0V 4.5V 4.0V 3.5V 3.0V 2.5V 5.00 6.0V 5.5V 5.0V 4.5V 4.0V 3.5V 3.0V 2.5V 4.00 5.00 1997 Microchip Technology Inc. ...
Page 165
... FREQUENCY (RC MODE @ 100 pF 1600 1400 1200 1000 800 600 400 200 0 0 200 400 Shaded area is beyond recommended range 1997 Microchip Technology Inc. 600 800 1000 1200 Frequency (kHz) 600 800 1000 1200 Frequency (kHz) PIC16C9XX 6.0V 5.5V 5.0V 4.5V 4.0V 3 ...
Page 166
... DS30444E - page 166 200 300 400 500 Frequency (kHz) 200 300 400 500 Frequency (kHz) 6.0V 5.5V 5.0V 4.5V 4.0V 3.5V 3.0V 2.5V 600 700 6.0V 5.5V 5.0V 4.5V 4.0V 3.5V 3.0V 2.5V 600 700 1997 Microchip Technology Inc. ...
Page 167
... The percentage variation indicated here is part to part variation due to normal process distribution. The variation indicated is 3 standard deviation from average value for V = 5V. DD 1997 Microchip Technology Inc. FIGURE 18-20:TRANSCONDUCTANCE(gm OSCILLATOR vs. V 4.0 3.5 1.4% 3.0 1.4% 2.5 1 ...
Page 168
... LC Spec -> Maximum = kHz, 4.0V 5.5 6.0 vs (LP MODE @ 25 C) 200 kHz, 15 pF/ kHz, 33 pF/33 pF 3.5 4.0 4.5 5.0 5.5 6 OLTS vs (LP MODE - +85 C) 200 kHz, 15 pF/ kHz, 33 pF/33 pF 3.5 4.0 4.5 5.0 5.5 6 OLTS 1997 Microchip Technology Inc. ...
Page 169
... MODE - +85 C) 2500 2000 1500 4 MHz, 15 pF/ MHz, 15 pF/15 pF 1000 500 200 kHz, 33 pF/ 2.5 3.0 3.5 4.0 4 OLTS Maximum = 5 mA, 4 MHz, 5.5V 1997 Microchip Technology Inc. FIGURE 18-30:TYPICAL 5.0 5.5 6.0 0 4.0 Typical = 3.5 mA, 8 MHz, 5.5V DD FIGURE 18-31:MAXIMUM ...
Page 170
... PIC16C9XX NOTES: DS30444E - page 170 1997 Microchip Technology Inc. ...
Page 171
... Millimeters Symbol Min Nominal 0.05 A2 0.95 b 0. 1997 Microchip Technology Inc. D/2 E E/2 See Detail See Detail B Datum Plane b A1 with Lead Finish 0.09/0.16 Base Metal Package Group: Plastic TQFP Max Min - 1.20 - 0.10 0.15 0.002 1.00 1.05 0.037 0.22 ...
Page 172
... Reference 0.750 21.08 0.750 3.43 0.120 64 64 – 0.047 – 0.027 Inches Max Notes 15 0.200 – 0.168 0.022 0.050 Typical 0.012 Typical 2.280 2.170 Reference 0.775 0.680 0.072 Typical 0.750 Reference 0.830 0.135 64 – – 1997 Microchip Technology Inc. ...
Page 173
... Package Group: Plastic Leaded Chip Carrier (PLCC) Millimeters Symbol Min A 4.191 A1 2.286 D 25.019 D1 24.130 D2 22.860 D3 20.320 E 25.019 E1 24.130 E2 22.860 E3 20.320 0.203 1997 Microchip Technology Inc. 1.27 .050 2 Sides 0.38 F-G 3 .015 - 0.38 F-G .015 -B- A F-G S .010 Max 11 1.524 0.508 ...
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... PIC16C923 -08I/PT 9712CAE Example PIC16C924 -08/L 9648CAE Example PIC16C924-04I/SP 9736CAE Microchip part number information Customer specific information* Year code (last 2 digits of calender year) Week code (week of January 1 is week '01’) Facility code of the plant at which wafer is manufactured Chandler, Arizona, U.S.A. ...
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... Reset status bit (POR). 17. Code protection scheme is enhanced such that portions of the program memory can be pro- tected, while the remainder is unprotected. 1997 Microchip Technology Inc. PIC16C9XX APPENDIX B: COMPATIBILITY To convert code written for PIC16C5X to PIC16CXX, the user should take the following steps: 1 ...
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... DS30444E - page 176 18 - TosH2ioL 30 - TmcL 34 - Tioz Timer0 and Timer1 External Clock Timings - Various TccR TccF 73 - TdiV2scH 74 - TscH2diL Combined A/D specification tables for Standard and Extended Voltage devices. ) 5.5V) 200 ns Min (LC devices Min 2.1 s Max 50 ns Min 50 ns Min 1997 Microchip Technology Inc. ...
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... External Brown-out1 ................................................. 112 External Brown-out2 ................................................. 112 External Parallel Cystal Oscillator............................. 105 External Power-on Reset .......................................... 112 External Series Crystal Oscillator ............................. 105 Interrupt Logic ........................................................... 114 LCD Module ................................................................ 90 On-Chip Reset Circuit ............................................... 106 PIC16C923 ................................................................. 10 PIC16C924 ................................................................. 11 PORTC ....................................................................... 35 PORTD ................................................................. 36, 37 PORTE........................................................................ 38 1997 Microchip Technology Inc. PIC16C9XX PORTF ........................................................................39 PORTG........................................................................40 PWM............................................................................59 RA3:RA0 and RA5 Port Pins ...
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... PC..................................................................................... 108 PCL Register .............................................. 19, 20, 21, 22, 29 PCLATH............................................................................ 109 PCLATH Register ....................................... 19, 20, 21, 22, 29 PCON ............................................................................... 109 PCON Register ................................................................... 28 PD............................................................................. 106, 108 PD bit .................................................................................. 23 PICDEM-1 Low-Cost PICmicro Demo Board ................... 138 PICDEM-2 Low-Cost PIC16CXX Demo Board................. 138 PICDEM-3 Low-Cost PIC16CXXX Demo Board .............. 138 1997 Microchip Technology Inc. ...
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... SS PIR1 .................................................................................. 113 PIR1 Register.............................................................. 19, 102 POP .................................................................................... 29 POR .......................................................................... 107, 108 1997 Microchip Technology Inc. PIC16C9XX Oscillator Start-up Timer (OST)........................ 103, 107 Power Control Register (PCON)............................... 107 Power-on Reset (POR)............................. 103, 107, 108 Power-up Timer (PWRT) .................................. 103, 107 Power-Up-Timer (PWRT) ......................................... 107 Time-out Sequence ...
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... TRISE Register....................................................... 38, 39, 40 Two’s Complement ............................................................... Erasable Devices............................................................ ...................................................................................... 108 W Register ALU............................................................................... 9 Wake-up from SLEEP....................................................... 117 Watchdog Timer (WDT)............................ 103, 106, 108, 116 WDT.................................................................................. 108 Period ....................................................................... 116 Programming Considerations ................................... 116 Timeout..................................................................... 108 X XMIT_MODE ...................................................................... 78 XT ............................................................................. 104, 107 Z Z bit..................................................................................... 23 Zero bit.................................................................................. 9 1997 Microchip Technology Inc. ...
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... Example 13-2: 1/3 MUX with 13 Segments ...................... 100 Example 14-1: Saving STATUS, W, and PCLATH Registers in RAM...................................... 115 List of Figures Figure 3-1: PIC16C923 Block Diagram......................... 10 Figure 3-2: PIC16C924 Block Diagram......................... 11 Figure 3-3: Clock/Instruction Cycle ............................... 15 Figure 4-1: Program Memory Map and Stack ............... 17 Figure 4-2: Register File Map........................................ 18 ...
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... Table 5-13: PORTG Functions ...................................... 40 . 163 DD Table 5-14: Summary of Registers Associated with PORTG....................................................... 40 Table 7-1: Registers Associated with Timer0 .............. 49 Table 8-1: Capacitor Selection for the Timer1 Oscillator .................................................... 53 vs. Frequency vs. Frequency DD vs. Frequency vs. Frequency DD vs. Frequency vs. Frequency 1997 Microchip Technology Inc. ...
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... I C Bus Start/Stop Bits Requirements ...... 156 2 Table 17-11 Bus Data Requirements ..................... 157 Table 17-12: A/D Converter Characteristics: PIC16C924-04 (Commercial, Industrial) PIC16LC924-04 (Commercial, Industrial). 158 Table 17-13: A/D Conversion Requirements ................. 159 Table 18-1: RC Oscillator Frequencies........................ 167 1997 Microchip Technology Inc. C Operation.... 77 PIC16C9XX ...
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... PIC16C9XX DS30444E - page 184 1997 Microchip Technology Inc. ...
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... Trademarks: The Microchip name, logo, PIC, PICSTART, PICMASTER and PRO MATE are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. PICmicro, ICSP, MPLAB and fuzzy LAB are trademarks and SQTP is a service mark of Microchip in the U ...
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... Is there any incorrect or misleading information (what and where)? 7. How would you improve this document? 8. How would you improve our software, systems, and silicon products? DS30444E - page 186 Total Pages Sent FAX: (______) _________ - _________ N Literature Number: DS30444E 1997 Microchip Technology Inc. ...
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... PIC16C9XXT : V range 4.0V to 6.0V (Tape/Reel) DD PIC16LC9XX : range 2. PIC16LC9XT : range 2.5V to 6.0V (Tape/Reel PIC16C9XX Examples a) PIC16C924 - 04/P 301 Commercial Temp., PDIP Package, 4 MHz, normal V limits, QTP DD pattern #301 b) PIC16LC923 - 04/PT Commercial Temp., TQFP package, 4 MHz, extended V limits DD c) PIC16C923 - 08I/CL Industrial Temp ...
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... Serialized Quick Turn Programming (SQTP service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2002, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Microchip received QS-9000 quality system ...
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... Korea Microchip Technology Korea 168-1, Youngbo Bldg. 3 Floor Samsung-Dong, Kangnam-Ku Seoul, Korea 135-882 Tel: 82-2-554-7200 Fax: 82-2-558-5934 Singapore Microchip Technology Singapore Pte Ltd. 200 Middle Road #07-02 Prime Centre Singapore, 188980 Tel: 65-6334-8870 Fax: 65-6334-8850 Taiwan Microchip Technology Taiwan 11F-3, No. 207 ...