DSPIC33FJ64GP706A-E/PT Microchip Technology, DSPIC33FJ64GP706A-E/PT Datasheet - Page 187

IC DSPIC MCU/DSP 64K 64-TQFP

DSPIC33FJ64GP706A-E/PT

Manufacturer Part Number
DSPIC33FJ64GP706A-E/PT
Description
IC DSPIC MCU/DSP 64K 64-TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr

Specifications of DSPIC33FJ64GP706A-E/PT

Program Memory Type
FLASH
Program Memory Size
64KB (64K x 8)
Package / Case
64-TFQFP
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
53
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 18x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC33F
Core
dsPIC
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
53
Data Ram Size
16 KB
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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18.0
The Universal Asynchronous Receiver Transmitter
(UART) module is one of the serial I/O modules
available
device family. The UART is a full-duplex asynchronous
system that can communicate with peripheral devices,
such as personal computers, LIN, RS-232 and RS-485
interfaces. The module also supports a hardware flow
control option with the UxCTS and UxRTS pins and
also includes an IrDA
The primary features of the UART module are:
• Full-Duplex, 8 or 9-bit Data Transmission through
• Even, Odd or No Parity Options (for 8-bit data)
• One or Two Stop bits
FIGURE 18-1:
© 2009 Microchip Technology Inc.
Note:
the UxTX and UxRX pins
Note 1: Both UART1 and UART2 can trigger a DMA data transfer. If U1TX, U1RX, U2TX or U2RX is selected as
2: If DMA transfers are required, the UART TX/RX FIFO buffer must be set to a size of 1 byte/word (i.e.,
UNIVERSAL ASYNCHRONOUS
RECEIVER TRANSMITTER
(UART)
in
This data sheet summarizes the features
of the dsPIC33FJXXXGPX06/X08/X10
family of devices. However, it is not
intended to be a comprehensive reference
source. To complement the information in
this data sheet, refer to Section 17.
“UART” (DS70188) in the “dsPIC33F
Family Reference Manual”, which is
available from the Microchip web site
(www.microchip.com).
a DMA IRQ source, a DMA transfer occurs when the U1TXIF, U1RXIF, U2TXIF or U2RXIF bit gets set as
a result of a UART1 or UART2 transmission or reception.
UTXISEL<1:0> = 00 and URXISEL<1:0> = 00).
the
®
dsPIC33FJXXXGPX06/X08/X10
UART SIMPLIFIED BLOCK DIAGRAM
encoder and decoder.
Hardware Flow Control
Baud Rate Generator
UART Transmitter
UART Receiver
dsPIC33FJXXXGPX06/X08/X10
IrDA
®
• Hardware Flow Control Option with UxCTS and
• Fully Integrated Baud Rate Generator with 16-bit
• Baud rates ranging from 1 Mbps to 15 bps at 16x
• Baud rates ranging from 4 Mbps to 61 bps at 4x mode
• 4-deep First-In-First-Out (FIFO) Transmit Data
• 4-Deep FIFO Receive Data Buffer
• Parity, Framing and Buffer Overrun Error Detection
• Support for 9-bit mode with Address Detect
• Transmit and Receive Interrupts
• A Separate Interrupt for all UART Error Conditions
• Loopback mode for Diagnostic Support
• Support for Sync and Break Characters
• Supports Automatic Baud Rate Detection
• IrDA
• 16x Baud Clock Output for IrDA
A simplified block diagram of the UART is shown in
Figure 18-1. The UART module consists of the key
important hardware elements:
• Baud Rate Generator
• Asynchronous Transmitter
• Asynchronous Receiver
UxRTS pins
Prescaler
mode at 40 MIPS
at 40 MIPS
Buffer
(9th bit = 1)
®
Encoder and Decoder Logic
UxRTS
UxCTS
UxRX
UxTX
BCLK
®
DS70286C-page 185
Support

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