PIC24FJ256GA110-E/PT Microchip Technology, PIC24FJ256GA110-E/PT Datasheet - Page 32
![IC PIC MCU FLASH 256KB 100-TQFP](/photos/12/13/121330/c04-100-tqfp_sml.jpg)
PIC24FJ256GA110-E/PT
Manufacturer Part Number
PIC24FJ256GA110-E/PT
Description
IC PIC MCU FLASH 256KB 100-TQFP
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheets
1.PIC24FJ128GA008-IPT.pdf
(12 pages)
2.PIC24FJ128GA106-IPT.pdf
(14 pages)
3.PIC24FJ128GA106-IPT.pdf
(330 pages)
4.PIC24FJ128GA106-IPT.pdf
(52 pages)
5.PIC24FJ256GA106-IPT.pdf
(59 pages)
6.PIC24FJ128GA110-EPT.pdf
(310 pages)
Specifications of PIC24FJ256GA110-E/PT
Program Memory Type
FLASH
Program Memory Size
256KB (85.5K x 24)
Package / Case
100-TFQFP
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
85
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
I2C/SPI/UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
85
Number Of Timers
5
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DM240011
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MA240015 - BOARD MCV PIM FOR 24F256GADM240011 - KIT STARTER MPLAB FOR PIC24F MCUAC164333 - MODULE SKT FOR PM3 100QFP
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24FJ256GA110-E/PT
Manufacturer:
FREESCALE
Quantity:
3 100
Company:
Part Number:
PIC24FJ256GA110-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC24FJXXXDA1/DA2/GB2/GA3
4.6
4.6.1
The PIC24FJXXXDA1/DA2/GB2/GA3 families have
Configuration bits stored in the last four locations of
implemented program memory (see
tions). These bits can be set or cleared to select various
device configurations. There are two types of Configura-
tion bits: system operation bits and code-protect bits. The
system operation bits determine the power-on settings
for system level components, such as the oscillator and
Watchdog Timer. The code-protect bits prevent program
memory from being read and written to.
TABLE 4-2:
DS39970B-page 32
ALTPMP
ALTVREF
DEBUG
FCKSM<1:0>
FNOSC<2:0>
FWDTEN
FWPSA
GCP
Note 1:
2:
3:
Configuration Bits Programming
Bit Field
Bits<23-16> should be programmed to a value of 0x00 to ensure that accidental program execution of any
of the Configuration Words would be interpreted as a NOP opcode.
The JTAGEN bit can be modified using only In-Circuit Serial Programming™ (ICSP™).
Irrespective of the WPCFG status, if WPEND = 1 or if WPFP corresponds to the Configuration Words
page, the Configuration Words page will be protected
OVERVIEW
PIC24FJXXXDA1/DA2/GB2 CONFIGURATION BITS DESCRIPTION
CW2<10:8>
Register
CW2<7:6>
CW3<12>
CW1<13>
CW1<11>
CW1<5>
CW1<7>
CW1<4>
Table 2-2
(1)
Alternate PMP Pin Mapping bit
1 = EPMP is in Default Location mode
0 = EPMP is in Alternate Location mode
Alternate V
1 = V
0 = V
Background Debugger Enable bit
1 = Device resets into Operational mode
0 = Device resets into Debug mode
Clock Switching and Fail-Safe Clock Monitor (FSCM) Configuration bits
1x = Clock switching and Fail-Safe Clock Monitor are disabled
01 = Clock switching is enabled, Fail-Safe Clock Monitor is disabled
00 = Clock switching is enabled, Fail-Safe Clock Monitor is enabled
Initial Oscillator Source Selection bits
111 = Fast RC Oscillator with Postscaler module (FRCDIV)
110 = Reserved
101 = Low-Power RC Oscillator (LPRC)
100 = Secondary Oscillator (SOSC)
011 = Primary Oscillator with PLL module (XTPLL, HSPLL, ECPLL)
010 = Primary (XT, HS, EC) Oscillator
001 = Fast RC Oscillator with Postscaler and PLL module (FRCPLL)
000 = Fast RC (FRC) Oscillator
Watchdog Timer Enable bit
1 = Watchdog Timer is enabled
0 = Watchdog Timer is disabled
Watchdog Timer Prescaler bit
1 = WDT prescaler ratio of 1:128
0 = WDT prescaler ratio of 1:32
General Segment Program Memory Code Protection bit
1 = Code protection is disabled
0 = Code protection is enabled for the entire program memory space
for loca-
REF
REF
is on a default pin (V
is on an alternate pin (V
REF
Location Enable bit
Table 4-2
PIC24FJXXXDA1/DA2/GB2 Configuration bits in the
Flash Configuration Words.
Note:
Description
REF
Although not implemented with a specific
function, the bit at CW1<15> must always
be maintained as ‘0’ to ensure device
functionality, regardless of the settings of
other Configuration bits.
provides
REF
+ on RA9 and V
+ on RB0 and V
2010 Microchip Technology Inc.
the
descriptions
REF
REF
- on RA10)
- on RB1)
for
the