PIC18F4525-E/P Microchip Technology, PIC18F4525-E/P Datasheet - Page 16
![IC MCU FLASH 24KX16 40DIP](/photos/6/61/66192/150-40-dip_sml.jpg)
PIC18F4525-E/P
Manufacturer Part Number
PIC18F4525-E/P
Description
IC MCU FLASH 24KX16 40DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC18F2221-ISO.pdf
(46 pages)
2.PIC18F2525-ISO.pdf
(412 pages)
3.PIC18F2525-ISO.pdf
(18 pages)
4.PIC18F2525-ISO.pdf
(18 pages)
5.PIC18F2525-ISO.pdf
(6 pages)
6.PIC18F2525-ISO.pdf
(6 pages)
7.PIC18LF4620-IP.pdf
(390 pages)
Specifications of PIC18F4525-E/P
Program Memory Type
FLASH
Program Memory Size
48KB (24K x 16)
Package / Case
40-DIP (0.600", 15.24mm)
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
36
Eeprom Size
1K x 8
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3986 B
Interface Type
SPI/I2C/EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
36
Number Of Timers
4
Operating Supply Voltage
4.2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, 53275-917, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
13-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
I3DB18F4620 - BOARD DAUGHTER ICEPIC3DVA18XP400 - DEVICE ADAPTER 18F4220 PDIP 40LDACICE0206 - ADAPTER MPLABICE 40P 600 MIL
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F4525-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC18F2XXX/4XXX FAMILY
TABLE 3-3:
FIGURE 3-3:
DS39622L-page 16
Step 1: Direct access to code memory and enable writes.
Step 2: Point to first row in code memory.
Step 3: Enable erase and erase single row.
Step 4: Repeat Step 3, with the Address Pointer incremented by 64 until all rows are erased.
Command
0000
0000
0000
0000
0000
0000
0000
0000
0000
4-Bit
8E A6
9C A6
84 A6
6A F8
6A F7
6A F6
88 A6
82 A6
00 00
ERASE CODE MEMORY CODE SEQUENCE
Data Payload
SINGLE ROW ERASE CODE MEMORY FLOW
Addr = Addr + 64
BSF
BCF
BSF
CLRF
CLRF
CLRF
BSF
BSF
NOP – hold PGC high for time P9 and low for time P10.
EECON1, EEPGD
EECON1, CFGS
EECON1, WREN
TBLPTRU
TBLPTRH
TBLPTRL
EECON1, FREE
EECON1, WR
No
Start Erase Sequence
and Hold PGC High
Hold PGC Low
Core Instruction
for Time P10
Row Erases
for Time P9
Device for
Configure
done?
Start
Done
rows
All
Yes
Addr = 0
2010 Microchip Technology Inc.