ATXMEGA16D4-AU Atmel, ATXMEGA16D4-AU Datasheet - Page 15

• Manufacturer Part Number: ATXMEGA16D4-AU
• Description: MCU AVR 16KB FLASH 44TQFP
• Manufacturer: Atmel
• Series: AVR® XMEGAr

Specifications of ATXMEGA16D4-AU

• Core Processor: AVR
• Core Size: 8/16-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 3.6 V
• Data Converters: A/D 12x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Processor Series: ATXMEGA16x
• Core: AVR8
• Data Bus Width: 8 bit
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

8. Event System
8.1
8.2
8135J–AVR–12/10
Features
Overview
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The Event System is a set of features for inter-peripheral communication. It enables the possibil-
ity for a change of state in one peripheral to automatically trigger actions in other peripherals.
The change of state in a peripheral that will trigger actions in other peripherals is configurable in
software. It is a simple, but powerful system as it allows for autonomous control of peripherals
without any use of interrupt, CPU resource.
The indication of a change in a peripheral is referred to as an event, and is usually the same as
the interrupt conditions for that peripheral. Events are passed between peripherals using a dedi-
cated routing network called the Event Routing Network.
block diagram of the Event System with the Event Routing Network and the peripherals to which
it is connected. This highly flexible system can be used for simple routing of signals, pin func-
tions or for sequencing of events.
The maximum latency is two CPU clock cycles from when an event is generated in one periph-
eral, until the actions are triggered in one or more other peripherals.
The Event System is functional in both Active and Idle modes.
Inter-peripheral communication and signalling with minimum latency
CPU independent operation
4 Event Channels allow for up to 4 signals to be routed at the same time
100% predictable timing between peripherals
Events can be generated by
Events can be used by
The same event can be used by multiple peripherals for synchronized timing
Advanced Features
Functiond in Active and Idle mode
– TImer/Counters (TCxn)
– Real Time Counter (RTC)
– Analog to Digital Converter (ADCx)
– Analog Comparator (ACx)
– Ports (PORTx)
– System Clock (Clk
– Software (CPU)
– TImer/Counters (TCxn)
– Analog to Digital Converter (ADCx)
– Ports (PORTx)
– IR Communication Module (IRCOM)
– Manual Event Generation from software (CPU)
– Quadrature Decoding
– Digital Filtering
SYS
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Figure 8-1 on page 16
XMEGA D4
shows a basic
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