PIC24FJ64GA004-I/ML Microchip Technology, PIC24FJ64GA004-I/ML Datasheet - Page 6

• Manufacturer Part Number: PIC24FJ64GA004-I/ML
• Description: IC PIC MCU FLASH 21KX24 44QFN
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ64GA004-I/ML

• Program Memory Type: FLASH
• Program Memory Size: 64KB (22K x 24)
• Package / Case: 44-QFN
• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, PMP, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 35
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC24FJ
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: I2C/IrDA/SPI/UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 35
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240011, DM300027, DV164033, MA240013, AC164127, DM240002
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 13-ch x 10-bit
• Controller Family/series: PIC24
• No. Of I/o's: 35
• Ram Memory Size: 8KB
• Cpu Speed: 32MHz
• No. Of Timers: 5
• Embedded Interface Type: I2C, SPI, UART
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1004 - PIC24 BREAKOUT BOARDDM240011 - KIT STARTER MPLAB FOR PIC24F MCUAC162088 - HEADER MPLAB ICD2 24FJ64GA004 28AC164336 - MODULE SOCKET FOR PM3 28/44QFNDV164033 - KIT START EXPLORER 16 MPLAB ICD2
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC24F Family Reference Manual
30.4
Figure 30-2:
DS39714A-page 30-6
D
PLEN<3:0>
OUT
XOR
CRC ENGINE
In
Hold
Bit 0
clk
Generic CRC Calculator Details
Out
0
30.4.1
The CRC engine is a serial shifting CRC calculator with feedforward and feedback points,
configurable though multiplexor settings. The topology of a generic CRC calculator is shown in
Figure 30-2.
The CRC algorithm uses a simplified form of arithmetic process, using the XOR operation instead
of binary division. The coefficients of the generator polynomial are programmed with the
CRCXOR<15:1> bits. Writing a ‘1’ into a location enables XORing of that element in the poly-
nomial. The length of the polynomial is programmed using the PLEN<3:0> bits in the CRCCON
register (CRCCON<3:0>). The PLEN<3:0> value signals the length of the polynomial, and
switches a multiplexor to indicate the tap from which the feedback originated.
The result of the CRC calculation is obtained by reading the holding registers through the CRC
read bus. A direct write path to the CRC Shift registers is also provided through the CRC write
bus. This path is accessed by the CPU through the CRCWDAT register.
X1
0
1
Generic CRC Engine
In
Hold
Bit 1
clk
Out
Advance Information
1
CRC Shift Register
X2
0
1
CRC Write Bus
In
Hold
Bit 2
clk
Out
2
CRC Read Bus
X3
0
1
© 2006 Microchip Technology Inc.
X15
0
1
In
Bit 15
Hold
clk
Out
15