DSPIC33FJ32MC202-I/SO Microchip Technology, DSPIC33FJ32MC202-I/SO Datasheet - Page 173

• Manufacturer Part Number: DSPIC33FJ32MC202-I/SO
• Description: IC DSPIC MCU/DSP 32K 28SOIC
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ32MC202-I/SO

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 6x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Core Frequency: 40MHz
• Core Supply Voltage: 2.75V
• Embedded Interface Type: I2C, SPI, UART
• No. Of I/o's: 21
• Flash Memory Size: 32KB
• Supply Voltage Range: 3V To 3.6V
• Package: 28SOIC W
• Device Core: dsPIC
• Family Name: dsPIC33
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 21
• Interface Type: I2C/SPI/UART
• On-chip Adc: 6-chx10-bit|6-chx12-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

16.0
FIGURE 16-1:
 2009 Microchip Technology Inc.
Note 1: This data sheet summarizes the features
UPDNx
INDXx
QEAx
QEBx
2: Some registers and associated bits
QUADRATURE ENCODER
INTERFACE (QEI) MODULE
Synchronize
of the dsPIC33FJ32MC202/204 and
dsPIC33FJ16MC304 family of devices. It
is not intended to be a comprehensive
reference source. To complement the
information in this data sheet, refer to
Section
Interface (QEI)” (DS70208) of the
“dsPIC33F/PIC24H Family Reference
Manual”, which is available from the
Microchip website (www.microchip.com).
described in this section may not be avail-
able on all devices. Refer to Section 4.0
“Memory Organization” in this data
sheet for device-specific register and bit
information.
Sleep Input
dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304
Det
PCDOUT
UPDN_SRC
QUADRATURE ENCODER INTERFACE BLOCK DIAGRAM
Programmable
Programmable
0
1
Programmable
15.
1
0
Digital Filter
Digital Filter
Digital Filter
QEIxCON<11>
Existing Pin Logic
Up/Down
“Quadrature
3
QEIM<2:0>
T
CY
Interface Logic
Quadrature
TQCS
Encoder
1
0
Encoder
Mode Select
QEIM<2:0>
Preliminary
3
TQGATE
1
0
2
This section describes the Quadrature Encoder Inter-
face (QEI) module and associated operational modes.
The QEI module provides the interface to incremental
encoders for obtaining mechanical position data.
The operational features of the QEI include:
• Three input channels for two phase signals and
• 16-bit up/down position counter
• Count direction status
• Position Measurement (x2 and x4) mode
• Programmable digital noise filters on inputs
• Alternate 16-bit Timer/Counter mode
• Quadrature Encoder Interface interrupts
These operating modes are determined by setting the
appropriate bits, QEIM<2:0> in (QEIxCON<10:8>).
Figure 16-1 depicts the Quadrature Encoder Interface
block diagram.
index pulse
16-bit Up/Down Counter
Max Count Register
D
CK
Comparator/
Zero Detect
(POSCNT)
(MAXCNT)
TQCKPS<1:0>
Q
Q
1, 8, 64, 256
Prescaler
2
Reset
Equal
DS70283G-page 173
QEIIF
Event
Flag