DSPIC33FJ64GP206-E/PT Microchip Technology, DSPIC33FJ64GP206-E/PT Datasheet - Page 100
![IC DSPIC MCU/DSP 64K 64TQFP](/photos/6/81/68123/c04-066_pf_sml.jpg)
DSPIC33FJ64GP206-E/PT
Manufacturer Part Number
DSPIC33FJ64GP206-E/PT
Description
IC DSPIC MCU/DSP 64K 64TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheets
1.DSPIC33FJ12GP201-ISO.pdf
(90 pages)
2.PIC24HJ12GP201-ISO.pdf
(84 pages)
3.DSPIC33FJ64GP206-IPT.pdf
(322 pages)
4.DSPIC33FJ64GP206-IPT.pdf
(28 pages)
Specifications of DSPIC33FJ64GP206-E/PT
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 18x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
64-TFQFP
For Use With
DM300024 - KIT DEMO DSPICDEM 1.1DV164033 - KIT START EXPLORER 16 MPLAB ICD2MA330012 - MODULE DSPIC33 100P TO 84QFPMA330011 - MODULE DSPIC33 100P TO 100QFPDM300019 - BOARD DEMO DSPICDEM 80L STARTERDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32AC164327 - MODULE SKT FOR 64TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
- DSPIC33FJ12GP201-ISO PDF datasheet
- PIC24HJ12GP201-ISO PDF datasheet #2
- DSPIC33FJ64GP206-IPT PDF datasheet #3
- DSPIC33FJ64GP206-IPT PDF datasheet #4
- Current page: 100 of 322
- Download datasheet (5Mb)
dsPIC33FJXXXGPX06/X08/X10
REGISTER 7-10:
DS70286C-page 98
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
bit 7
bit 6
bit 5
bit 4
bit 3
R/W-0
T2IE
U-0
—
Unimplemented: Read as ‘0’
DMA1IE: DMA Channel 1 Data Transfer Complete Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
AD1IE: ADC1 Conversion Complete Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
U1TXIE: UART1 Transmitter Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
U1RXIE: UART1 Receiver Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
SPI1IE: SPI1 Event Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
SPI1EIE: SPI1 Error Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
T3IE: Timer3 Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
T2IE: Timer2 Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
OC2IE: Output Compare Channel 2 Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
IC2IE: Input Capture Channel 2 Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
DMA0IE: DMA Channel 0 Data Transfer Complete Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
T1IE: Timer1 Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
DMA1IE
OC2IE
R/W-0
R/W-0
IEC0: INTERRUPT ENABLE CONTROL REGISTER 0
W = Writable bit
‘1’ = Bit is set
AD1IE
R/W-0
R/W-0
IC2IE
DMA0IE
U1TXIE
R/W-0
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U1RXIE
R/W-0
R/W-0
T1IE
SPI1IE
OC1IE
R/W-0
R/W-0
© 2009 Microchip Technology Inc.
x = Bit is unknown
SPI1EIE
R/W-0
R/W-0
IC1IE
INT0IE
R/W-0
R/W-0
T3IE
bit 8
bit 0
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