PIC18F4431-E/P Microchip Technology, PIC18F4431-E/P Datasheet - Page 51

• Manufacturer Part Number: PIC18F4431-E/P
• Description: IC MCU FLASH 8KX16 40DIP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4431-E/P

• Core Size: 8-Bit
• Program Memory Size: 16KB (8K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 9x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Controller Family/series: PIC18
• No. Of I/o's: 36
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 768Byte
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: EUSART, I2C, SPI, SSP
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 1 x 8
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 9 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DVA18XP400 - DEVICE ADAPTER 18F4220 PDIP 40LDACICE0206 - ADAPTER MPLABICE 40P 600 MIL
• Lead Free Status / Rohs Status: Details

4.6
On power-up, the time-out sequence is as follows:
First, after the POR pulse has cleared, PWRT time-out
is invoked (if enabled). Then, the OST is activated. The
total time-out will vary based on oscillator configuration
and the status of the PWRT. For example, in RC mode
with the PWRT disabled, there will be no time-out at all.
Figures 4-3 through 4-7 depict time-out sequences on
power-up.
TABLE 4-1:
REGISTER 4-1:
TABLE 4-2:
© 2007 Microchip Technology Inc.
HSPLL
HS, XT, LP
EC, ECIO
RC, RCIO
INTIO1, INTIO2
Note 1:
Power-on Reset
RESET Instruction
Brown-out
MCLR Reset during power-managed
Run modes
MCLR Reset during power-managed Idle
and Sleep modes
WDT Time-out during full power or
power-managed Run modes
MCLR Reset during full power execution
Stack Full Reset (STVREN = 1)
Stack Underflow Reset (STVREN = 1)
Stack Underflow Error (not an actual
Reset, STVREN = 0)
WDT time-out during power-managed Idle
or Sleep modes
Interrupt exit from power-managed modes
Legend:
Note 1:
Configuration
2:
Oscillator
Time-out Sequence
66 ms (65.5 ms) is the nominal Power-up Timer (PWRT) delay.
2 ms is the nominal time required for the 4x PLL to lock.
u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’.
When the wake-up is due to an interrupt and the GIEH or GIEL bits are set, the PC is loaded with the
interrupt vector (0x000008h or 0x000018h).
Condition
TIME-OUT IN VARIOUS SITUATIONS
STATUS BITS, THEIR SIGNIFICANCE AND THE INITIALIZATION CONDITION FOR
RCON REGISTER
RCON REGISTER BITS AND POSITIONS
bit 7
Note:
R/W-0
IPEN
66 ms
66 ms
(1)
Refer to Section 5.14 “RCON Register” for bit definitions.
PWRTEN = 0
+ 1024 T
(1)
66 ms
66 ms
66 ms
U-0
—
+ 1024 T
Program
PC + 2
Counter
(1)
(1)
(1)
OSC
PC + 2
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
Power-up
PIC18F2331/2431/4331/4431
+ 2 ms
OSC
(1)
U-0
Preliminary
—
0--1 1100
0--0 uuuu
0--1 11u-
0--u 1uuu
0--u 10uu
0--u 0uuu
0--u uuuu
u--u uuuu
u--u 00uu
u--u u0uu
(2)
(2)
Register
RCON
and Brown-out
R/W-1
RI
Since the time-outs occur from the POR pulse, if MCLR
is kept low long enough, all time-outs will expire. Bring-
ing MCLR high will begin execution immediately
(Figure 4-5). This is useful for testing purposes or to
synchronize more than one PIC18FXXXX device
operating in parallel.
Table 4-2 shows the Reset conditions for some Special
Function Registers, while Table 4-3 shows the Reset
conditions for all the registers.
1024 T
PWRTEN = 1
RI
1
0
1
u
u
u
u
u
u
u
1024 T
OSC
TO
—
—
—
1
u
1
1
1
0
u
u
0
u
R-1
TO
+ 2 ms
OSC
PD
1
u
1
u
0
u
u
u
0
0
(2)
POR
0
u
u
u
u
u
u
u
u
u
R-1
PD
BOR STKFUL STKUNF
Power-Managed Mode
0
u
0
u
u
u
u
u
u
u
1024 T
R/W-0
POR
1024 T
Exit From
DS39616C-page 49
OSC
0
u
u
u
u
u
u
1
u
u
u
u
—
—
—
+ 2 ms
OSC
R/W-0
BOR
(2)
0
u
u
u
u
u
u
u
1
1
u
u
bit 0