AT32UC3L064-D3HT Atmel, AT32UC3L064-D3HT Datasheet - Page 42

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AT32UC3L064-D3HT

Manufacturer Part Number
AT32UC3L064-D3HT
Description
MCU AVR32 64K FLASH 48TTLGA
Manufacturer
Atmel
Series
AVR®32 UC3r
Datasheet

Specifications of AT32UC3L064-D3HT

Core Processor
AVR
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, PWM, WDT
Number Of I /o
36
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.62 V ~ 3.6 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT32UC3L064-D3HT
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
7.4
7.5
32099F–11/2010
Maximum Clock Frequencies
Power Consumption
Table 7-3.
Note:
These parameters are given in the following conditions:
• V
• Temperature = -40°C to 85°C
Table 7-4.
The values in
tions, except where noted:
• Operating conditions internal core supply
Symbol
V
V
V
V
Symbol
f
f
f
f
f
f
f
f
f
CPU
PBA
PBB
GCLK0
GCLK1
GCLK2
GCLK3
GCLK4
GCLK5
VDDIO
VDDIN
VDDCORE
VDDANA
VDDCORE
– V
– V
VDDIN
VDDCORE
1. These values are based on simulation and characterization of other AVR microcontrollers
manufactured in the same process technology. These values are not covered by test limits in
production.
= 1.62V to 1.98V
Parameter
DC supply peripheral I/Os
DC supply peripheral I/Os
and internal regulator
DC supply core
Analog supply voltage
= 3.0V
Parameter
CPU clock frequency
PBA clock frequency
PBB clock frequency
GCLK0 clock frequency
GCLK1 clock frequency
GCLK2 clock frequency
GCLK3 clock frequency
GCLK4 clock frequency
GCLK5 clock frequency
Table 7-5
Supply Rise Rates and Order
Clock Frequencies
= 1.62V, supplied by the internal regulator
are measured values of power consumption under the following condi-
GLOC
Conditions
DFLLIF main reference, GCLK0
pin
DFLLIF dithering and ssg
reference, GCLK1 pin
AST, GCLK2 pin
PWMA, GCLK3 pin
CAT, ACIFB, GCLK4 pin
0.002
Min
0
0
0
(Figure
(1)
7-1) - this is the default configuration
Max
2.5
2.5
2.5
2.5
AT32UC3L016/32/64
V/µs
V/µs
V/µs
V/µs
Unit
Rise Rate
Slower rise time requires
external power-on reset
circuit.
Rise before or at the same
time as VDDIO
Rise together with
VDDCORE
Min
Comment
Max
150
150
110
110
50
50
50
80
80
Units
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
42

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