PIC18F46J50-I/PT Microchip Technology, PIC18F46J50-I/PT Datasheet - Page 511
PIC18F46J50-I/PT
Manufacturer Part Number
PIC18F46J50-I/PT
Description
IC PIC MCU FLASH 64KB 44-TQFP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Specifications of PIC18F46J50-I/PT
Core Size
8-Bit
Program Memory Size
64KB (32K x 16)
Core Processor
PIC
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
34
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Controller Family/series
PIC18
No. Of I/o's
22
Ram Memory Size
3.6875KB
Cpu Speed
48MHz
No. Of Timers
2
No. Of Pwm Channels
2
Package
44TQFP
Device Core
PIC
Family Name
PIC18
Maximum Speed
48 MHz
Operating Supply Voltage
2.5|3.3 V
Data Bus Width
8 Bit
Interface Type
I2C/SPI/USART/USB
On-chip Adc
13-chx10-bit
Number Of Timers
5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164330 - MODULE SKT FOR 44TQFP 18F45J10
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F46J50-I/PT
Manufacturer:
NXP
Quantity:
3 000
Company:
Part Number:
PIC18F46J50-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC18F46J50-I/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- Current page: 511 of 554
- Download datasheet (9Mb)
FIGURE 29-10:
TABLE 29-17: PARALLEL MASTER PORT READ TIMING REQUIREMENTS
© 2009 Microchip Technology Inc.
Param.
PM1
PM2
PM3
PM5
PM6
PM7
Operating Conditions: 2.0V < V
System
Clock
PMA<13:18>
PMD<7:0>
PMRD
PMWR
PMALL/PMALH
PMCS<2:1>
No
Symbol
PMALL/PMALH Pulse Width
Address Out Valid to PMALL/PMALH
Invalid (address setup time)
PMALL/PMALH Invalid to Address Out
Invalid (address hold time)
PMRD Pulse Width
PMRD or PMENB Active to Data In Valid
(data setup time)
PMRD or PMENB Inactive to Data In Invalid
(data hold time)
Q1
PARALLEL MASTER PORT READ TIMING DIAGRAM
PM2
DD
Address<7:0>
Q2
< 3.6V, -40°C < T
PM1
Characteristics
Q3
Address
A
PM3
Q4
< +85°C unless otherwise stated.
Q1
PIC18F46J50 FAMILY
PM6
Q2
Min
—
—
—
—
—
—
Q3
PM5
0.75 T
0.25 T
PM7
0.5 T
0.5 T
Data
Typ
—
—
Q4
CY
CY
CY
CY
Q1
DS39931C-page 511
Max
—
—
—
—
—
—
Q2
Units
ns
ns
ns
ns
ns
ns
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