PIC16C925-I/PT Microchip Technology, PIC16C925-I/PT Datasheet - Page 28

• Manufacturer Part Number: PIC16C925-I/PT
• Description: IC MCU OTP 4KX14 LCD DVR 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C925-I/PT

• Core Size: 8-Bit
• Program Memory Size: 7KB (4K x 14)
• Core Processor: PIC
• Speed: 20MHz
• Connectivity: I²C, SPI
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Type: OTP
• Ram Size: 176 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Controller Family/series: PIC16C
• No. Of I/o's: 25
• Ram Memory Size: 176Byte
• Cpu Speed: 20MHz
• No. Of Timers: 3
• No. Of Pwm Channels: 1
• Embedded Interface Type: I2C, SPI
• Rohs Compliant: Yes
• Processor Series: PIC16C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 176 B
• Interface Type: I2C, SPI
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 25
• Number Of Timers: 3
• Operating Supply Voltage: 2.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 5 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DVA16PQ640 - ADAPTER DEVICE FOR MPLAB-ICEAC164023 - MODULE SKT PROMATEII 68TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC16C925I/PT

PIC16C925/926
2.6
The INDF register is not a physical register. Addressing
the INDF register will cause indirect addressing.
Indirect addressing is possible by using the INDF reg-
ister. Any instruction using the INDF register actually
accesses the register pointed to by the File Select Reg-
ister (FSR). Reading the INDF register itself, indirectly
(FSR = ’0’), will produce 00h. Writing to the INDF regis-
ter indirectly results in a no operation (although status
bits may be affected). An effective 9-bit address is
obtained by concatenating the 8-bit FSR register and
the IRP bit (STATUS<7>), as shown in Figure 2-6.
FIGURE 2-6:
DS39544A-page 26
Bank Select
RP1:RP0
Note: For memory map detail, see Figure 2-3.
Indirect Addressing, INDF and
FSR Registers
Direct Addressing
Location Select
6
Data
Memory
DIRECT/INDIRECT ADDRESSING
From Opcode
7Fh
00h
Bank 0
00
0
Bank 1
01
Preliminary
Bank 2
10
A simple program to clear RAM locations 20h-2Fh
using indirect addressing is shown in Example 2-2.
EXAMPLE 2-2:
NEXT
CONTINUE
Bank 3
11
IRP
MOVLW 0x20
MOVWF FSR
CLRF
INCF
BTFSS FSR,4
GOTO
:
Bank Select
00h
7Fh
INDF
FSR,F
NEXT
7
Indirect Addressing
INDIRECT ADDRESSING
2001 Microchip Technology Inc.
;initialize pointer
;to RAM
;clear INDF register
;inc pointer
;all done?
;no clear next
;yes continue
FSR Register
Location Select
0