PIC18F65K22-I/PTRSL Microchip Technology, PIC18F65K22-I/PTRSL Datasheet - Page 115

• Manufacturer Part Number: PIC18F65K22-I/PTRSL
• Description: MCU PIC 32K FLASH MEM XLP 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F65K22-I/PTRSL

• Core Size: 8-Bit
• Program Memory Size: 32KB (16K x 16)
• Core Processor: PIC
• Speed: 64MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Controller Family/series: PIC18
• Eeprom Memory Size: 1024Byte
• Ram Memory Size: 2048Byte
• Cpu Speed: 16MIPS
• No. Of Timers: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

7.5
The programming blocks are:
• PIC18FX5K22 and PIC18FX6K22 – 32 words or
• PIC18FX7K22 – 64 words or 128 bytes
Word or byte programming is not supported.
Table writes are used internally to load the holding
registers needed to program the Flash memory. The
number of holding registers used for programming by
the table writes are:
• PIC18FX5K22 and PIC18FX6K22 – 64
• PIC18FX7K22 – 128
Since the Table Latch (TABLAT) is only a single byte, the
TBLWT instruction may need to be executed 64 times for
each programming operation. All of the table write oper-
ations will essentially be short writes because only the
holding registers are written. At the end of updating the
FIGURE 7-5:
 2010 Microchip Technology Inc.
TBLPTR = xxxxx0
64 bytes
Writing to Flash Program Memory
Holding Register
8
TABLE WRITES TO FLASH PROGRAM MEMORY
TBLPTR = xxxxx1
Holding Register
8
Preliminary
Program Memory
TBLPTR = xxxxx2
Write Register
TABLAT
PIC18F87K22 FAMILY
64 or 128 holding registers, the EECON1 register must
be written to in order to start the programming operation
with a long write.
The long write is necessary for programming the
internal Flash. Instruction execution is halted while in a
long write cycle. The long write is terminated by the
internal programming timer.
The EEPROM on-chip timer controls the write time.
The write/erase voltages are generated by an on-chip
charge pump, rated to operate over the voltage range
of the device.
Holding Register
Note:
8
The default value of the holding registers on
device Resets and after write operations is
FFh. A write of FFh to a holding register
does not modify that byte. This means that
individual bytes of program memory may be
modified, provided that the change does not
attempt to change any bit from a ‘0’ to a ‘1’.
When modifying individual bytes, it is not
necessary to load all 64 or 128 holding
registers before executing a write operation.
TBLPTR = xxxx3F
Holding Register
DS39960B-page 115
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