ATMEGA169P-16MU Atmel, ATMEGA169P-16MU Datasheet - Page 385

IC AVR MCU 16K 16MHZ IND 64-QFN

ATMEGA169P-16MU

Manufacturer Part Number
ATMEGA169P-16MU
Description
IC AVR MCU 16K 16MHZ IND 64-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet

Specifications of ATMEGA169P-16MU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-MLF®, 64-QFN
Processor Series
ATMEGA16x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPI, USART, USI
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
54
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRBFLY
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Package
64MLF EP
Device Core
AVR
Family Name
ATmega
Maximum Speed
16 MHz
Operating Supply Voltage
3.3|5 V
For Use With
ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATAVRBFLY - KIT EVALUATION AVR BUTTERFLYATSTK502 - MOD EXPANSION AVR STARTER 500ATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
35. Datasheet Revision History
35.1
35.2
35.3
35.4
35.5
35.6
8018P–AVR–08/10
Rev. 8018P 08/10
Rev. 8018O 10/09
Rev. 8018N 08/09
Rev. 8018M 07/09
Rev. L 08/08
Rev. K 06/08
Please note that the referring page numbers in this section are referring to this document. The
referring revision in this section are referring to the document revision.
1.
2.
3.
1.
2.
1.
1.
1.
2.
1.
2.
3.
4.
5.
6.
7.
8.
9.
Status changed to active
EEPROM minimum wait delay,
ms to 3.6 ms
Datasheet layout and technical terminology updated
Changed datasheet status to “Mature”
Added Capacitance for Low-frequency Crystal Oscillator,
Updated
Updated the last page with new Atmel’s addresses.
Updated package information in
Added
• The Staggered QFN is named Dual Row QFN (DRQFN).
Updated package information in
Removed “Disclaimer” from section
Added
Added
Updated
Updated
Updated
Updated
Updated
”Pinout - DRQFN” on page
”64MC (DRQFN) Pinout ATmega169P” on page 3
”Data Retention” on page
”Ordering Information” on page
”Stack Pointer” on page
”Low-frequency Crystal Oscillator” on page
”USART Register Description” on page
”UCSRnB – USART Control and Status Register n B” on page
V
IL2
in
”DC Characteristics” on page
Table 27-15 on page
”Features” on page
”Features” on page
9.
13.
3:
”Pin Configurations” on page 2
380, MCU replaced by MCH.
329, by removing
194, register descriptions and tables.
1.
1.
34.
312, has been changed from 9.0
Table 8-5 on page
ATmega169P
0.2V
CC
from the table.
195.
33.
385

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