DSPIC33FJ12MC202-I/SS Microchip Technology, DSPIC33FJ12MC202-I/SS Datasheet - Page 20
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DSPIC33FJ12MC202-I/SS
Manufacturer Part Number
DSPIC33FJ12MC202-I/SS
Description
IC DSPIC MCU/DSP 12K 28SSOP
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheets
1.PIC24HJ12GP201-ISO.pdf
(84 pages)
2.DSPIC33FJ12MC201-ISO.pdf
(288 pages)
3.DSPIC33FJ12MC201-ISO.pdf
(14 pages)
4.DSPIC33FJ12MC202-IML.pdf
(282 pages)
Specifications of DSPIC33FJ12MC202-I/SS
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
12KB (12K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 6x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP
Core Frequency
40MHz
Core Supply Voltage
2.75V
Embedded Interface Type
I2C, JTAG, SPI, UART
No. Of I/o's
21
Flash Memory Size
12KB
Supply Voltage Range
3V To 3.6V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC33FJ12MC202-I/SS
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
TABLE 3-11:
TABLE 3-12:
DS70152H-page 20
0xF80000 FBS
0xF80002 FSS
0xF80004 FGS
0xF80006 FOSCSEL
0xF80008 FOSC
0xF8000A FWDT
0xF8000C FPOR
0xF8000E FICD
0xF80010 FUID0
0xF80012 FUID1
0xF80014 FUID2
0xF80016 FUID3
Legend: — = unimplemented bit, read as ‘0’.
0xF80000 FBS
0xF80002 FSS
0xF80004 FGS
0xF80006 FOSCSEL
0xF80008 FOSC
0xF8000A FWDT
0xF8000C FPOR
0xF8000E FICD
0xF80010 FUID0
0xF80012 FUID1
0xF80014 FUID2
0xF80016 FUID3
Legend: — = unimplemented bit, reads as ‘0’.
Note 1:
Address
Address
Note 1: These bits are reserved for use by development tools and must be programmed as ‘1’.
2:
3:
2: When read, this bit returns the current programmed value.
3: This bit is unimplemented on dsPIC33FJ64GPX06A/X08A/X10A and dsPIC33FJ128GPX06A/X08A/X10A
4: These bits are reserved and always read as ‘1’.
These bits are reserved for use by development tools and must be programmed as ‘1’.
When read, this bit returns the current programmed value.
This bit is unimplemented on dsPIC33FJ64MCX06A/X08A/X10A and dsPIC33FJ128MCX06A/X08A/X10A
devices and reads as ‘0’.
devices and reads as ‘0’.
Name
Name
dsPIC33FJXXXGPX06A/X08A/X10A AND PIC24HJXXXGPX06A/X08A/X10A DEVICE
CONFIGURATION REGISTER MAP
dsPIC33FJXXXMCX06A/X08A/X10A DEVICE CONFIGURATION REGISTER MAP
FWDTEN
FWDTEN
PWMPIN
IESO
Bit 7
IESO
Bit 7
—
FCKSM<1:0>
—
Reserved
FCKSM<1:0>
RBS<1:0>
RSS<1:0>
Reserved
RBS<1:0>
RSS<1:0>
Reserved
Reserved
Reserved
WINDIS
WINDIS
Bit 6
(1)
HPOL
Bit 6
(1)
—
—
(2)
(4)
(2)
PLLKEN
JTAGEN
PLLKEN
JTAGEN
Bit 5
LPOL
Bit 5
—
—
—
—
—
—
—
—
—
—
(3)
(3)
User Unit ID Byte 0
User Unit ID Byte 1
User Unit ID Byte 2
User Unit ID Byte 3
User Unit ID Byte 0
User Unit ID Byte 1
User Unit ID Byte 2
User Unit ID Byte 3
WDTPRE
WDTPRE
Bit 4
Bit 4
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Bit 3
Bit 3
—
—
—
—
—
—
—
—
—
—
BSS<2:0>
SSS<2:0>
BSS<2:0>
SSS<2:0>
OSCIOFNC POSCMD<1:0>
OSCIOFNC POSCMD<1:0>
© 2010 Microchip Technology Inc.
WDTPOST<3:0>
WDTPOST<3:0>
GSS1
GSS1
Bit 2
Bit 2
—
—
FPWRT<2:0>
FNOSC<2:0>
FPWRT<2:0>
FNOSC<2:0>
GSS0
GSS0
Bit 1
Bit 1
ICS<1:0>
ICS<1:0>
GWRP
BWRP
SWRP
GWRP
BWRP
SWRP
Bit 0
Bit 0