PIC16C621-20/SS Microchip Technology, PIC16C621-20/SS Datasheet - Page 25
![IC MCU OTP 1KX14 COMP 20SSOP](/photos/6/58/65895/150-20-ssop_sml.jpg)
PIC16C621-20/SS
Manufacturer Part Number
PIC16C621-20/SS
Description
IC MCU OTP 1KX14 COMP 20SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Specifications of PIC16C621-20/SS
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
13
Program Memory Size
1.75KB (1K x 14)
Program Memory Type
OTP
Ram Size
80 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 6 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
20-SSOP
For Use With
309-1016 - ADAPTER 20-SSOP TO 18-DIP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
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4.3
The program counter (PC) is 13-bits wide. The low byte
comes from the PCL register, which is a readable and
writable register. The high byte (PC<12:8>) is not
directly readable or writable and comes from PCLATH.
On any RESET, the PC is cleared. Figure 4-8 shows
the two situations for the loading of the PC. The upper
example in the figure shows how the PC is loaded on a
write to PCL (PCLATH<4:0> → PCH). The lower
example in the figure shows how the PC is loaded
during a CALL or GOTO instruction (PCLATH<4:3> →
PCH).
FIGURE 4-8:
4.3.1
A computed GOTO is accomplished by adding an
offset to the program counter (ADDWF
doing a table read using a computed GOTO method,
care should be exercised if the table location crosses a
PCL memory boundary (each 256 byte block). Refer to
the application note, “Implementing a Table Read"
(AN556).
2003 Microchip Technology Inc.
PC
PC
12
12
2
11 10
PCL and PCLATH
5
PCH
PCLATH<4:3>
PCH
COMPUTED GOTO
PCLATH
PCLATH<4:0>
8
PCLATH
8
7
7
LOADING OF PC IN
DIFFERENT SITUATIONS
PCL
PCL
11
8
0
0
Instruction with
PCL as
Destination
ALU result
GOTO,CALL
Opcode <10:0>
PCL). When
4.3.2
The PIC16C62X family has an 8-level deep x 13-bit
wide hardware stack (Figure 4-2 and Figure 4-3). The
stack space is not part of either program or data space
and the stack pointer is not readable or writable. The
PC is PUSHed onto the stack when a CALL instruction
is executed or an interrupt causes a branch. The stack
is POPed in the event of a RETURN,
RETFIE instruction execution. PCLATH is not affected
by a PUSH or POP operation.
The stack operates as a circular buffer. This means that
after the stack has been PUSHed eight times, the ninth
push overwrites the value that was stored from the first
push. The tenth push overwrites the second push (and
so on).
Note 1: There are no STATUS bits to indicate
2: There are no instructions/mnemonics
STACK
stack
conditions.
called PUSH or POP. These are actions
that occur from the execution of the
CALL, RETURN, RETLW and RETFIE
instructions, or the vectoring to an
interrupt address.
overflow
PIC16C62X
or
stack
DS30235J-page 23
RETLW or a
underflow
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