PIC18LF2221-I/SP Microchip Technology, PIC18LF2221-I/SP Datasheet - Page 107
![IC PIC MCU FLASH 2KX16 28DIP](/photos/6/59/65908/150-28-dip_sml.jpg)
PIC18LF2221-I/SP
Manufacturer Part Number
PIC18LF2221-I/SP
Description
IC PIC MCU FLASH 2KX16 28DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC18F2221-ISO.pdf
(402 pages)
2.PIC18F2221-ISO.pdf
(8 pages)
3.PIC18F2221-ISO.pdf
(30 pages)
4.PIC18F2221-ISO.pdf
(46 pages)
5.PIC18LF2221-IML.pdf
(394 pages)
6.PIC18F2321-IML.pdf
(396 pages)
Specifications of PIC18LF2221-I/SP
Core Size
8-Bit
Program Memory Size
4KB (2K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Controller Family/series
PIC18
No. Of I/o's
25
Eeprom Memory Size
256Byte
Ram Memory Size
512Byte
Cpu Speed
40MHz
No. Of Timers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC18F2221-ISO PDF datasheet
- PIC18F2221-ISO PDF datasheet #2
- PIC18F2221-ISO PDF datasheet #3
- PIC18F2221-ISO PDF datasheet #4
- PIC18LF2221-IML PDF datasheet #5
- PIC18F2321-IML PDF datasheet #6
- Current page: 107 of 394
- Download datasheet (7Mb)
10.0
Depending on the device selected and features
enabled, there are up to five ports available. Some pins
of the I/O ports are multiplexed with an alternate
function from the peripheral features on the device. In
general, when a peripheral is enabled, that pin may not
be used as a general purpose I/O pin.
Each port has three registers for its operation. These
registers are:
• TRIS register (data direction register)
• PORT register (reads the levels on the pins of the
• LAT register (output latch)
The Data Latch (LAT register) is useful for read-modify-
write operations on the value that the I/O pins are
driving.
A simplified model of a generic I/O port, without the
interfaces to other peripherals, is shown in Figure 10-1.
FIGURE 10-1:
10.1
PORTA is an 8-bit wide, bidirectional port. The corre-
sponding data direction register is TRISA. Setting a
TRISA bit (= 1) will make the corresponding PORTA pin
an input (i.e., put the corresponding output driver in a
high-impedance mode). Clearing a TRISA bit (= 0) will
make the corresponding PORTA pin an output (i.e., put
the contents of the output latch on the selected pin).
© 2005 Microchip Technology Inc.
device)
Note 1:
RD LAT
Data
Bus
WR LAT
or Port
WR TRIS
RD TRIS
RD Port
I/O PORTS
PORTA, TRISA and LATA Registers
I/O pins have diode protection to V
TRIS Latch
Data Latch
D
D
CK
CK
GENERIC I/O PORT
OPERATION
Q
Q
Q
EN
EN
D
DD
and V
Advance Information
I/O pin
Input
Buffer
SS
.
(1)
Reading the PORTA register reads the status of the
pins, whereas writing to it, will write to the port latch.
The Data Latch (LATA) register is also memory mapped.
Read-modify-write operations on the LATA register read
and write the latched output value for PORTA.
The RA4 pin is multiplexed with the Timer0 module
clock input and one of the comparator outputs to
become the RA4/T0CKI/C1OUT pin. Pins RA6 and
RA7 are multiplexed with the main oscillator pins. They
are enabled as oscillator or I/O pins by the selection of
the main oscillator in the Configuration register (see
Section 23.1 “Configuration Bits” for details). When
they are not used as port pins, RA6 and RA7 and their
associated TRIS and LAT bits are read as ‘0’.
The other PORTA pins are multiplexed with analog
inputs, the analog V
comparator voltage reference output. The operation of
pins RA3:RA0 and RA5 as A/D converter inputs is
selected by clearing or setting the control bits in the
ADCON1 register (A/D Control Register 1).
Pins RA0 through RA5 may also be used as comparator
inputs or outputs by setting the appropriate bits in the
CMCON register. To use RA3:RA0 as digital inputs, it is
also necessary to turn off the comparators.
The RA4/T0CKI/C1OUT pin is a Schmitt Trigger input.
All other PORTA pins have TTL input levels and full
CMOS output drivers.
The TRISA register controls the direction of the PORTA
pins, even when they are being used as analog inputs.
The user must ensure the bits in the TRISA register are
maintained set when using them as analog inputs.
EXAMPLE 10-1:
PIC18F4321 FAMILY
CLRF
CLRF
MOVLW
MOVWF
MOVWF
MOVWF
MOVLW
MOVWF
Note:
PORTA
LATA
0Fh
ADCON1 ; for digital inputs
07h
CMCON
0CFh
TRISA
On a Power-on Reset, RA5 and RA3:RA0
are configured as analog inputs and read
as ‘0’. RA4 is configured as a digital input.
; Initialize PORTA by
; clearing output
; data latches
; Alternate method
; to clear output
; data latches
; Configure all A/D
; Configure comparators
; for digital input
; Value used to
; initialize data
; direction
; Set RA<7:6,3:0> as inputs
; RA<5:4> as outputs
REF
INITIALIZING PORTA
+ and V
REF
DS39689A-page 105
- inputs and the
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