ATMEGA16L-8MUR Atmel, ATMEGA16L-8MUR Datasheet - Page 41
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ATMEGA16L-8MUR
Manufacturer Part Number
ATMEGA16L-8MUR
Description
MCU AVR 16KB FLASH 16MHZ 44QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA16L-8MI.pdf
(357 pages)
Specifications of ATMEGA16L-8MUR
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Watchdog Reset
MCU Control and
Status Register –
MCUCSR
2466T–AVR–07/10
When the Watchdog times out, it will generate a short reset pulse of one CK cycle duration. On
the falling edge of this pulse, the delay timer starts counting the Time-out period t
page 42
Figure 20. Watchdog Reset During Operation
The MCU Control and Status Register provides information on which reset source caused an
MCU Reset.
• Bit 4 – JTRF: JTAG Reset Flag
This bit is set if a reset is being caused by a logic one in the JTAG Reset Register selected by
the JTAG instruction AVR_RESET. This bit is reset by a Power-on Reset, or by writing a logic
zero to the flag.
• Bit 3 – WDRF: Watchdog Reset Flag
This bit is set if a Watchdog Reset occurs. The bit is reset by a Power-on Reset, or by writing a
logic zero to the flag.
• Bit 2 – BORF: Brown-out Reset Flag
This bit is set if a Brown-out Reset occurs. The bit is reset by a Power-on Reset, or by writing a
logic zero to the flag.
• Bit 1 – EXTRF: External Reset Flag
This bit is set if an External Reset occurs. The bit is reset by a Power-on Reset, or by writing a
logic zero to the flag.
• Bit 0 – PORF: Power-on Reset Flag
This bit is set if a Power-on Reset occurs. The bit is reset only by writing a logic zero to the flag.
To make use of the Reset Flags to identify a reset condition, the user should read and then reset
the MCUCSR as early as possible in the program. If the register is cleared before another reset
occurs, the source of the reset can be found by examining the Reset Flags.
Bit
Read/Write
Initial Value
for details on operation of the Watchdog Timer.
CC
JTD
R/W
7
0
ISC2
R/W
6
0
R
5
–
0
CK
JTRF
R/W
4
WDRF
R/W
3
See Bit Description
BORF
R/W
2
EXTRF
R/W
1
ATmega16(L)
PORF
R/W
0
MCUCSR
TOUT
. Refer to
41
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