DSPIC30F3014T-30I/PT Microchip Technology, DSPIC30F3014T-30I/PT Datasheet - Page 125
DSPIC30F3014T-30I/PT
Manufacturer Part Number
DSPIC30F3014T-30I/PT
Description
IC DSPIC MCU/DSP 24K 44TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F2011-20ISO.pdf
(66 pages)
2.DSPIC30F3014-30IPT.pdf
(228 pages)
3.DSPIC30F3014-30IPT.pdf
(16 pages)
4.DSPIC30F3014-30IPT.pdf
(6 pages)
5.DSPIC30F3014-30IPT.pdf
(14 pages)
6.DSPIC30F3014-30IPT.pdf
(20 pages)
Specifications of DSPIC30F3014T-30I/PT
Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
30
Program Memory Size
24KB (8K x 24)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 13x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
For Use With
AC30F006 - MODULE SKT FOR DSPIC30F 44TQFPACICE0206 - ADAPTER MPLABICE 40P 600 MIL
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
DSPIC30F3014T30IP
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC30F3014T-30I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- DSPIC30F2011-20ISO PDF datasheet
- DSPIC30F3014-30IPT PDF datasheet #2
- DSPIC30F3014-30IPT PDF datasheet #3
- DSPIC30F3014-30IPT PDF datasheet #4
- DSPIC30F3014-30IPT PDF datasheet #5
- DSPIC30F3014-30IPT PDF datasheet #6
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- Download datasheet (2Mb)
18.3.7
The DCI module has a dedicated 12-bit time base that
produces the bit clock. The bit clock rate (period) is set
by writing a non-zero 12-bit value to the BCG<11:0>
control bits in the DCICON3 SFR.
When the BCG<11:0> bits are set to zero, the bit clock
is disabled. If the BCG<11:0> bits are set to a non-zero
value, the bit clock generator is enabled. These bits
should be set to ‘0’ and the CSCKD bit set to ‘1’ if the
serial clock for the DCI is received from an external
device.
The formula for the bit clock frequency is given in
Equation
TABLE 18-1:
2010 Microchip Technology Inc.
Note 1:
F
S
44.1
12
32
48
2:
(kHz)
8
18-2.
When the CSCK signal is applied externally (CSCKD = 1), the BCG<11:0> bits have no effect on the
operation of the DCI module.
When the CSCK signal is applied externally (CSCKD = 1), the external clock high and low times must
meet the device timing requirements.
BIT CLOCK GENERATOR
DEVICE FREQUENCIES FOR COMMON CODEC CSCK FREQUENCIES
F
CSCK
256
256
32
32
64
/F
S
F
CSCK
1.4112
2.048
3.072
1.024
3.072
(MHz)
(1)
F
OSC
5.6448
6.144
8.192
8.192
6.144
EQUATION 18-2:
The required bit clock frequency is determined by the
system sampling rate and frame size. Typical bit clock
frequencies range from 16x to 512x the converter
sample rate depending on the data converter and the
communication protocol that is used.
To achieve bit clock frequencies associated with
common audio sampling rates, the user needs to select
a crystal frequency that has an ‘even’ binary value.
Examples of such crystal frequencies are listed in
Table
(MH
dsPIC30F3014/4013
Z
18-1.
)
PLL
F
16
4
8
8
8
BCK
=
BIT CLOCK FREQUENCY
2 (BCG + 1)
•
F
F
CY
11.2896
12.288
16.384
24.576
CY
8.192
(MIPS)
DS70138G-page 125
BCG
1
1
7
3
3
(2)
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