ATMEGA324PA-MUR Atmel, ATMEGA324PA-MUR Datasheet - Page 273

• Manufacturer Part Number: ATMEGA324PA-MUR
• Description: MCU AVR 32KB FLASH 20 MHZ 44QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA324PA-MUR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

24.5.2
8152G–AVR–11/09
Scanning the RESET Pin
Figure 24-4. General Port Pin Schematic Diagram
The RESET pin accepts 5V active low logic for standard reset operation, and 12V active high
logic for High Voltage Parallel programming. An observe-only cell as shown in
inserted for the 5V reset signal.
Figure 24-5. Observe-only Cell
See Boundary-scan
Description for Details!
Pxn
From System Pin
PUD:
PUExn:
OCxn:
ODxn:
IDxn:
SLEEP:
IDxn
ATmega164PA/324PA/644PA/1284P
PULLUP DISABLE
PULLUP ENABLE for pin Pxn
OUTPUT CONTROL for pin Pxn
OUTPUT DATA to pin Pxn
INPUT DATA from pin Pxn
SLEEP CONTROL
Previous
From
PUExn
Cell
ShiftDR
0
1
ClockDR
SLEEP
OCxn
ODxn
D
FF1
SYNCHRONIZER
WDx:
RDx:
WRx:
RRx:
RPx:
CLK
D
L
Q
Q
Q
Next
I/O
Cell
To
:
D
WRITE DDRx
READ DDRx
WRITE PORTx
READ PORTx REGISTER
READ PORTx PIN
I/O CLOCK
PINxn
Q
Q
To System Logic
RESET
RESET
Q
Q
Q
Q
PORTxn
DDxn
CLR
CLR
D
D
CLK
PUD
WDx
RDx
WRx
RPx
RRx
I/O
Figure 24-5
273
is