PIC24FJ16GA002-I/ML Microchip Technology, PIC24FJ16GA002-I/ML Datasheet - Page 21
![IC PIC MCU FLASH 16K 28-QFN](/photos/6/81/68120/150-28-qfn_sml.jpg)
PIC24FJ16GA002-I/ML
Manufacturer Part Number
PIC24FJ16GA002-I/ML
Description
IC PIC MCU FLASH 16K 28-QFN
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheets
1.PIC24FJ16GA002-ISS.pdf
(52 pages)
2.PIC24FJ16GA002-ISS.pdf
(268 pages)
3.PIC24FJ16GA002-ISS.pdf
(22 pages)
4.PIC24FJ64GA004-EPT.pdf
(262 pages)
Specifications of PIC24FJ16GA002-I/ML
Core Size
16-Bit
Program Memory Size
16KB (5.5K x 24)
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
21
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Controller Family/series
PIC24
No. Of I/o's
21
Ram Memory Size
4KB
Cpu Speed
32MHz
No. Of Timers
5
No. Of Pwm Channels
5
Embedded Interface Type
I2C, SPI, UART
Rohs Compliant
Yes
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
4 KB
Interface Type
I2C, IrDA, SPI, UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
21
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240011, MA240013, AC164127, DM300027, DV164033, DM240002
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
Package
28QFN EP
Device Core
PIC
Family Name
PIC24
Maximum Speed
32 MHz
Operating Supply Voltage
2.5|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM240011 - KIT STARTER MPLAB FOR PIC24F MCUAC162088 - HEADER MPLAB ICD2 24FJ64GA004 28AC164336 - MODULE SOCKET FOR PM3 28/44QFNDV164033 - KIT START EXPLORER 16 MPLAB ICD2
Eeprom Size
-
Lead Free Status / Rohs Status
Details
- PIC24FJ16GA002-ISS PDF datasheet
- PIC24FJ16GA002-ISS PDF datasheet #2
- PIC24FJ16GA002-ISS PDF datasheet #3
- PIC24FJ64GA004-EPT PDF datasheet #4
- Current page: 21 of 268
- Download datasheet (2Mb)
2.4
The on-chip voltage regulator enable/disable pin
(ENVREG or DISVREG, depending on the device
family) must always be connected directly to either a
supply voltage or to ground. The particular connection
is determined by whether or not the regulator is to be
used:
• For ENVREG, tie to V
• For DISVREG, tie to ground to enable the
Refer to Section 24.2 “On-Chip Voltage Regulator”
for details on connecting and using the on-chip
regulator.
When the regulator is enabled, a low-ESR (<5Ω)
capacitor is required on the V
stabilize the voltage regulator output voltage. The
V
must use a capacitor of 10 F connected to ground. The
type can be ceramic or tantalum. A suitable example is
the Murata GRM21BF50J106ZE01 (10 F, 6.3V) or
equivalent. Designers may use Figure 2-3 to evaluate
ESR equivalence of candidate devices.
The placement of this capacitor should be close to
V
length not exceed 0.25 inch (6 mm). Refer to
Section 27.0
additional information.
When the regulator is disabled, the V
must be tied to a voltage supply at the V
Refer to Section 27.0 “Electrical Characteristics” for
information on V
2010 Microchip Technology Inc.
CAP
CAP
Note:
or to ground to disable the regulator
regulator or to V
/V
/V
DDCORE
DDCORE
Voltage Regulator Pins
(ENVREG/DISVREG and
V
CAP
This section applies only to PIC24FJ
devices with an on-chip voltage regulator.
. It is recommended that the trace
/V
pin must not be connected to V
“Electrical
DD
DDCORE
DD
and V
to disable the regulator
DD
DDCORE
to enable the regulator,
)
Characteristics”
CAP
.
/V
CAP
DDCORE
DDCORE
/V
DDCORE
DD
pin to
level.
, and
PIC24FJ64GA004 FAMILY
pin
for
FIGURE 2-3:
2.5
The PGECx and PGEDx pins are used for In-Circuit
Serial Programming (ICSP) and debugging purposes.
It is recommended to keep the trace length between
the ICSP connector and the ICSP pins on the device as
short as possible. If the ICSP connector is expected to
experience an ESD event, a series resistor is recom-
mended, with the value in the range of a few tens of
ohms, not to exceed 100Ω.
Pull-up resistors, series diodes and capacitors on the
PGECx and PGEDx pins are not recommended as they
will interfere with the programmer/debugger communi-
cations to the device. If such discrete components are
an application requirement, they should be removed
from the circuit during programming and debugging.
Alternatively, refer to the AC/DC characteristics and
timing requirements information in the respective
device Flash programming specification for information
on capacitive loading limits and pin input voltage high
(V
For device emulation, ensure that the “Communication
Channel Select” (i.e., PGECx/PGEDx pins) programmed
into the device matches the physical connections for the
ICSP to the Microchip debugger/emulator tool.
For
development tools connection requirements, refer to
Section 25.0 “Development Support”.
IH
0.001
Note:
0.01
) and input low (V
0.1
10
more
1
0.01
ICSP Pins
Data for Murata GRM21BF50J106ZE01 shown.
Measurements at 25°C, 0V DC bias.
information
0.1
Frequency (MHz)
IL
FREQUENCY vs. ESR
PERFORMANCE FOR
SUGGESTED V
1
) requirements.
on
10
available
100
DS39881D-page 21
CAP
1000 10,000
Microchip
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